Received: by 2002:a05:6a10:f347:0:0:0:0 with SMTP id d7csp1065041pxu; Mon, 23 Nov 2020 10:42:03 -0800 (PST) X-Google-Smtp-Source: ABdhPJx5PHKfFE1/7D+SWX3QBvSwvDVDlQD/bM2rgFVbRzyHdAMHWoCi+wVRbHgeDoXCqDQm+1EG X-Received: by 2002:aa7:d514:: with SMTP id y20mr513067edq.384.1606156923668; Mon, 23 Nov 2020 10:42:03 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1606156923; cv=none; d=google.com; s=arc-20160816; b=AhUfymPGIRZRIUqyX7t+3rWkzed8tqMXxUNvCO5+n26Y+FuP1gxGc2waZnJ/Z2g8vu ZJVhrDubToQuDOSSe+lobjw37Psah/VgkbWvubL87hm25j5qaQ10KT6CfIIoUIrUs8lh UC6JVYWZ9j9Dd5YXBj+rXG/t7nx8fsY6iN6F+2yNGpyI+YkAb/olDTrWbfXtCuIAeC35 PYpNNqCQBp18J1NawyLHMJyzAkzXa35dWRgJt6ZQOD6gISmUcyCBnE9VEHb16m5ktGSo y5ZO2cv8zsttAK1O0bU9U/DHND2wZw2/A30XqY2Hm5Q5mK1ECJb4Krb5hPuEZC2dn71G B5Lw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from; bh=CnQvVfc0Mmq1+y2zBYxGX1+xfTqez1FfxZ8ROzilenY=; b=daV4sL65A0cKzWIw0Qf6D4b1RCrgHebN19jDOTUxsVMb06T7QFX/rhthfAW0uE8d1/ VDC6VVRqMZRBvUbYeXutRHdEnGNvp9u/+9TChITALpmt/v1WVTbGrQbj4Jmwgy8a4x8G jZvPOHEna79HAcXwoDVf6k7yx7bdIHQSQ3ijT2RiGkfSxhS4IIwb+jmb5Vk8qidPjCAS uEEmBFX3vSOIoPAH3xLAs9Jwdfi0y58JKQTbhC9lStFs3+SlqEe/lTA35BWQvYJryQ6p sBiww5wzkSfOa4vu4On7syQsAfA8mubuATPr+sxZldSL4X/nZ4DY4kmXV227at5zhDNj qFLg== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [23.128.96.18]) by mx.google.com with ESMTP id fx6si2962158ejb.334.2020.11.23.10.41.39; Mon, 23 Nov 2020 10:42:03 -0800 (PST) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) client-ip=23.128.96.18; Authentication-Results: mx.google.com; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S2387944AbgKWSjB (ORCPT + 99 others); Mon, 23 Nov 2020 13:39:01 -0500 Received: from mx2.suse.de ([195.135.220.15]:59432 "EHLO mx2.suse.de" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S2387749AbgKWSi4 (ORCPT ); Mon, 23 Nov 2020 13:38:56 -0500 X-Virus-Scanned: by amavisd-new at test-mx.suse.de Received: from relay2.suse.de (unknown [195.135.221.27]) by mx2.suse.de (Postfix) with ESMTP id 4EA0EACB0; Mon, 23 Nov 2020 18:38:54 +0000 (UTC) From: Nicolas Saenz Julienne To: u.kleine-koenig@pengutronix.de, linux-kernel@vger.kernel.org, Thierry Reding , Lee Jones Cc: f.fainelli@gmail.com, linux-pwm@vger.kernel.org, bcm-kernel-feedback-list@broadcom.com, linux-arm-kernel@lists.infradead.org, devicetree@vger.kernel.org, wahrenst@gmx.net, linux-input@vger.kernel.org, dmitry.torokhov@gmail.com, gregkh@linuxfoundation.org, devel@driverdev.osuosl.org, p.zabel@pengutronix.de, linux-gpio@vger.kernel.org, linus.walleij@linaro.org, linux-clk@vger.kernel.org, sboyd@kernel.org, linux-rpi-kernel@lists.infradead.org, bgolaszewski@baylibre.com, andy.shevchenko@gmail.com, Nicolas Saenz Julienne Subject: [PATCH v5 11/11] pwm: Add Raspberry Pi Firmware based PWM bus Date: Mon, 23 Nov 2020 19:38:32 +0100 Message-Id: <20201123183833.18750-12-nsaenzjulienne@suse.de> X-Mailer: git-send-email 2.29.2 In-Reply-To: <20201123183833.18750-1-nsaenzjulienne@suse.de> References: <20201123183833.18750-1-nsaenzjulienne@suse.de> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Adds support to control the PWM bus available in official Raspberry Pi PoE HAT. Only RPi's co-processor has access to it, so commands have to be sent through RPi's firmware mailbox interface. Signed-off-by: Nicolas Saenz Julienne --- Changes since v3: - Rename compatible string to be more explicit WRT to bus's limitations Changes since v2: - Use devm_rpi_firmware_get() - Rename driver - Small cleanups Changes since v1: - Use default pwm bindings and get rid of xlate() function - Correct spelling errors - Correct apply() function - Round values - Fix divisions in arm32 mode - Small cleanups drivers/pwm/Kconfig | 9 ++ drivers/pwm/Makefile | 1 + drivers/pwm/pwm-raspberrypi-poe.c | 216 ++++++++++++++++++++++++++++++ 3 files changed, 226 insertions(+) create mode 100644 drivers/pwm/pwm-raspberrypi-poe.c diff --git a/drivers/pwm/Kconfig b/drivers/pwm/Kconfig index 0937e1c047ac..75e2344703b3 100644 --- a/drivers/pwm/Kconfig +++ b/drivers/pwm/Kconfig @@ -423,6 +423,15 @@ config PWM_PXA To compile this driver as a module, choose M here: the module will be called pwm-pxa. +config PWM_RASPBERRYPI_POE + tristate "Raspberry Pi Firwmware PoE Hat PWM support" + # Make sure not 'y' when RASPBERRYPI_FIRMWARE is 'm'. This can only + # happen when COMPILE_TEST=y, hence the added !RASPBERRYPI_FIRMWARE. + depends on RASPBERRYPI_FIRMWARE || (COMPILE_TEST && !RASPBERRYPI_FIRMWARE) + help + Enable Raspberry Pi firmware controller PWM bus used to control the + official RPI PoE hat + config PWM_RCAR tristate "Renesas R-Car PWM support" depends on ARCH_RENESAS || COMPILE_TEST diff --git a/drivers/pwm/Makefile b/drivers/pwm/Makefile index 18b89d7fd092..ed28d7bd4c64 100644 --- a/drivers/pwm/Makefile +++ b/drivers/pwm/Makefile @@ -38,6 +38,7 @@ obj-$(CONFIG_PWM_MXS) += pwm-mxs.o obj-$(CONFIG_PWM_OMAP_DMTIMER) += pwm-omap-dmtimer.o obj-$(CONFIG_PWM_PCA9685) += pwm-pca9685.o obj-$(CONFIG_PWM_PXA) += pwm-pxa.o +obj-$(CONFIG_PWM_RASPBERRYPI_POE) += pwm-raspberrypi-poe.o obj-$(CONFIG_PWM_RCAR) += pwm-rcar.o obj-$(CONFIG_PWM_RENESAS_TPU) += pwm-renesas-tpu.o obj-$(CONFIG_PWM_ROCKCHIP) += pwm-rockchip.o diff --git a/drivers/pwm/pwm-raspberrypi-poe.c b/drivers/pwm/pwm-raspberrypi-poe.c new file mode 100644 index 000000000000..24b498839fcc --- /dev/null +++ b/drivers/pwm/pwm-raspberrypi-poe.c @@ -0,0 +1,216 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * Copyright 2020 Nicolas Saenz Julienne + * For more information on Raspberry Pi's PoE hat see: + * https://www.raspberrypi.org/products/poe-hat/ + * + * Limitations: + * - No disable bit, so a disabled PWM is simulated by duty_cycle 0 + * - Only normal polarity + * - Fixed 12.5 kHz period + * + * The current period is completed when HW is reconfigured. + */ + +#include +#include +#include +#include + +#include +#include + +#define RPI_PWM_MAX_DUTY 255 +#define RPI_PWM_PERIOD_NS 80000 /* 12.5 kHz */ + +#define RPI_PWM_CUR_DUTY_REG 0x0 +#define RPI_PWM_DEF_DUTY_REG 0x1 + +struct raspberrypi_pwm { + struct rpi_firmware *firmware; + struct pwm_chip chip; + unsigned int duty_cycle; +}; + +struct raspberrypi_pwm_prop { + __le32 reg; + __le32 val; + __le32 ret; +} __packed; + +static inline struct raspberrypi_pwm *to_raspberrypi_pwm(struct pwm_chip *chip) +{ + return container_of(chip, struct raspberrypi_pwm, chip); +} + +static int raspberrypi_pwm_set_property(struct rpi_firmware *firmware, + u32 reg, u32 val) +{ + struct raspberrypi_pwm_prop msg = { + .reg = cpu_to_le32(reg), + .val = cpu_to_le32(val), + }; + int ret; + + ret = rpi_firmware_property(firmware, RPI_FIRMWARE_SET_POE_HAT_VAL, + &msg, sizeof(msg)); + if (ret) + return ret; + if (msg.ret) + return -EIO; + + return 0; +} + +static int raspberrypi_pwm_get_property(struct rpi_firmware *firmware, + u32 reg, u32 *val) +{ + struct raspberrypi_pwm_prop msg = { + .reg = reg + }; + int ret; + + ret = rpi_firmware_property(firmware, RPI_FIRMWARE_GET_POE_HAT_VAL, + &msg, sizeof(msg)); + if (ret) + return ret; + if (msg.ret) + return -EIO; + + *val = le32_to_cpu(msg.val); + + return 0; +} + +static void raspberrypi_pwm_get_state(struct pwm_chip *chip, + struct pwm_device *pwm, + struct pwm_state *state) +{ + struct raspberrypi_pwm *rpipwm = to_raspberrypi_pwm(chip); + + state->period = RPI_PWM_PERIOD_NS; + state->duty_cycle = DIV_ROUND_CLOSEST(rpipwm->duty_cycle * RPI_PWM_PERIOD_NS, + RPI_PWM_MAX_DUTY); + state->enabled = !!(rpipwm->duty_cycle); + state->polarity = PWM_POLARITY_NORMAL; +} + +static int raspberrypi_pwm_apply(struct pwm_chip *chip, struct pwm_device *pwm, + const struct pwm_state *state) +{ + struct raspberrypi_pwm *rpipwm = to_raspberrypi_pwm(chip); + unsigned int duty_cycle; + int ret; + + if (state->period < RPI_PWM_PERIOD_NS || + state->polarity != PWM_POLARITY_NORMAL) + return -EINVAL; + + if (!state->enabled) + duty_cycle = 0; + else if (state->duty_cycle < RPI_PWM_PERIOD_NS) + duty_cycle = DIV_ROUND_CLOSEST_ULL(state->duty_cycle * RPI_PWM_MAX_DUTY, + RPI_PWM_PERIOD_NS); + else + duty_cycle = RPI_PWM_MAX_DUTY; + + if (duty_cycle == rpipwm->duty_cycle) + return 0; + + ret = raspberrypi_pwm_set_property(rpipwm->firmware, RPI_PWM_CUR_DUTY_REG, + duty_cycle); + if (ret) { + dev_err(chip->dev, "Failed to set duty cycle: %d\n", ret); + return ret; + } + + /* + * This sets the default duty cycle after resetting the board, we + * updated it every time to mimic Raspberry Pi's downstream's driver + * behaviour. + */ + ret = raspberrypi_pwm_set_property(rpipwm->firmware, RPI_PWM_DEF_DUTY_REG, + duty_cycle); + if (ret) { + dev_err(chip->dev, "Failed to set default duty cycle: %d\n", ret); + return ret; + } + + rpipwm->duty_cycle = duty_cycle; + + return 0; +} + +static const struct pwm_ops raspberrypi_pwm_ops = { + .get_state = raspberrypi_pwm_get_state, + .apply = raspberrypi_pwm_apply, + .owner = THIS_MODULE, +}; + +static int raspberrypi_pwm_probe(struct platform_device *pdev) +{ + struct device_node *firmware_node; + struct device *dev = &pdev->dev; + struct rpi_firmware *firmware; + struct raspberrypi_pwm *rpipwm; + int ret; + + firmware_node = of_get_parent(dev->of_node); + if (!firmware_node) { + dev_err(dev, "Missing firmware node\n"); + return -ENOENT; + } + + firmware = devm_rpi_firmware_get(&pdev->dev, firmware_node); + of_node_put(firmware_node); + if (!firmware) + return -EPROBE_DEFER; + + rpipwm = devm_kzalloc(&pdev->dev, sizeof(*rpipwm), GFP_KERNEL); + if (!rpipwm) + return -ENOMEM; + + rpipwm->firmware = firmware; + rpipwm->chip.dev = dev; + rpipwm->chip.ops = &raspberrypi_pwm_ops; + rpipwm->chip.base = -1; + rpipwm->chip.npwm = RASPBERRYPI_FIRMWARE_PWM_NUM; + + platform_set_drvdata(pdev, rpipwm); + + ret = raspberrypi_pwm_get_property(rpipwm->firmware, RPI_PWM_CUR_DUTY_REG, + &rpipwm->duty_cycle); + if (ret) { + dev_err(dev, "Failed to get duty cycle: %d\n", ret); + return ret; + } + + return pwmchip_add(&rpipwm->chip); +} + +static int raspberrypi_pwm_remove(struct platform_device *pdev) +{ + struct raspberrypi_pwm *rpipwm = platform_get_drvdata(pdev); + + return pwmchip_remove(&rpipwm->chip); +} + +static const struct of_device_id raspberrypi_pwm_of_match[] = { + { .compatible = "raspberrypi,firmware-poe-pwm", }, + { } +}; +MODULE_DEVICE_TABLE(of, raspberrypi_pwm_of_match); + +static struct platform_driver raspberrypi_pwm_driver = { + .driver = { + .name = "raspberrypi-poe-pwm", + .of_match_table = raspberrypi_pwm_of_match, + }, + .probe = raspberrypi_pwm_probe, + .remove = raspberrypi_pwm_remove, +}; +module_platform_driver(raspberrypi_pwm_driver); + +MODULE_AUTHOR("Nicolas Saenz Julienne "); +MODULE_DESCRIPTION("Raspberry Pi Firwmare Based PWM Bus Driver"); +MODULE_LICENSE("GPL v2"); -- 2.29.2