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Date:   Tue, 24 Nov 2020 10:03:22 +0100
From:   Ludovic Desroches <ludovic.desroches@microchip.com>
To:     Linus Walleij <linus.walleij@linaro.org>
CC:     Eugen Hristev <eugen.hristev@microchip.com>,
        Nicolas Ferre <nicolas.ferre@microchip.com>,
        <linux-arm-kernel@lists.infradead.org>,
        "open list:GPIO SUBSYSTEM" <linux-gpio@vger.kernel.org>,
        "linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>
Subject: Re: [PATCH] pinctrl: at91-pio4: add support for fewer lines on last
 PIO bank
Message-ID: <20201124090322.cjugamri37yxcqy7@sekiro>
References: <20201113132429.420940-1-eugen.hristev@microchip.com>
 <CACRpkdYdPp_ihSEHkPaLa0_mcX+8ypnPZ4dn0d-PY9Mes1XntQ@mail.gmail.com>
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On Tue, Nov 24, 2020 at 09:31:36AM +0100, Linus Walleij wrote:
> EXTERNAL EMAIL: Do not click links or open attachments unless you know the content is safe
> 
> On Fri, Nov 13, 2020 at 2:25 PM Eugen Hristev
> <eugen.hristev@microchip.com> wrote:
> 
> > Some products, like sama7g5, do not have a full last bank of PIO lines.
> > In this case for example, sama7g5 only has 8 lines for the PE bank.
> > PA0-31, PB0-31, PC0-31, PD0-31, PE0-7, in total 136 lines.
> > To cope with this situation, added a data attribute that is product dependent,
> > to specify the number of lines of the last bank.
> > In case this number is different from the macro ATMEL_PIO_NPINS_PER_BANK,
> > adjust the total number of lines accordingly.
> > This will avoid advertising 160 lines instead of the actual 136, as this
> > product supports, and to avoid reading/writing to invalid register addresses.
> >
> > Signed-off-by: Eugen Hristev <eugen.hristev@microchip.com>
> 
> Nico/Ludovic: can you please look at this patch?

I acked it one week ago but I get some nasty behaviors with my emails. Maybe you
didn't receive the answer.
https://lore.kernel.org/linux-gpio/20201116061549.ks6hfonyplwhknmq@sekiro/

Regards

Ludovic

> 
> Yours,
> Linus Walleij