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From:   Michal Simek <monstr@monstr.eu>
Date:   Wed, 25 Nov 2020 13:28:58 +0100
Message-ID: <CAHTX3dK1q4S_DzT-1Wdf-W=ac7ZTBCGPC46yeAhd4RgM-1+8Qw@mail.gmail.com>
Subject: Re: [PATCH] arm64: dts: zynqmp: Fix pcie ranges description
To:     LKML <linux-kernel@vger.kernel.org>,
        Michal Simek <monstr@monstr.eu>, git <git@xilinx.com>
Cc:     Kalyani Akula <kalyani.akula@xilinx.com>,
        Krzysztof Kozlowski <krzk@kernel.org>,
        Laurent Pinchart <laurent.pinchart@ideasonboard.com>,
        Manish Narani <manish.narani@xilinx.com>,
        Michael Tretter <m.tretter@pengutronix.de>,
        Nava kishore Manne <nava.manne@xilinx.com>,
        Rajan Vaja <rajan.vaja@xilinx.com>,
        Rob Herring <robh+dt@kernel.org>,
        DTML <devicetree@vger.kernel.org>,
        linux-arm <linux-arm-kernel@lists.infradead.org>
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=C3=BAt 29. 9. 2020 v 13:43 odes=C3=ADlatel Michal Simek <michal.simek@xili=
nx.com> napsal:
>
> DT schema is checking tuples which should be properly separated. The patc=
h
> is doing this separation to avoid the following warning:
> ..yaml: axi: pcie@fd0e0000:ranges: [[33554432, 0, 3758096384, 0,
> 3758096384, 0, 268435456, 1124073472, 6, 0, 6, 0, 2, 0]] is not valid und=
er
> any of the given schemas (Possible causes of the failure):
> ...dt.yaml: axi: pcie@fd0e0000:ranges: True was expected
> ...dt.yaml: axi: pcie@fd0e0000:ranges:0: [33554432, 0, 3758096384, 0,
> 3758096384, 0, 268435456, 1124073472, 6, 0, 6, 0, 2, 0] is too long
>
> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
> ---
>
> I have seen one conversation about it but don't have link which I can poi=
nt
> to.
> ---
>  arch/arm64/boot/dts/xilinx/zynqmp.dtsi | 4 ++--
>  1 file changed, 2 insertions(+), 2 deletions(-)
>
> diff --git a/arch/arm64/boot/dts/xilinx/zynqmp.dtsi b/arch/arm64/boot/dts=
/xilinx/zynqmp.dtsi
> index 771f60e0346d..98073f3223e5 100644
> --- a/arch/arm64/boot/dts/xilinx/zynqmp.dtsi
> +++ b/arch/arm64/boot/dts/xilinx/zynqmp.dtsi
> @@ -542,8 +542,8 @@ pcie: pcie@fd0e0000 {
>                               <0x0 0xfd480000 0x0 0x1000>,
>                               <0x80 0x00000000 0x0 0x1000000>;
>                         reg-names =3D "breg", "pcireg", "cfg";
> -                       ranges =3D <0x02000000 0x00000000 0xe0000000 0x00=
000000 0xe0000000 0x00000000 0x10000000  /* non-prefetchable memory */
> -                                 0x43000000 0x00000006 0x00000000 0x0000=
0006 0x00000000 0x00000002 0x00000000>;/* prefetchable memory */
> +                       ranges =3D <0x02000000 0x00000000 0xe0000000 0x00=
000000 0xe0000000 0x00000000 0x10000000>,/* non-prefetchable memory */
> +                                <0x43000000 0x00000006 0x00000000 0x0000=
0006 0x00000000 0x00000002 0x00000000>;/* prefetchable memory */
>                         bus-range =3D <0x00 0xff>;
>                         interrupt-map-mask =3D <0x0 0x0 0x0 0x7>;
>                         interrupt-map =3D <0x0 0x0 0x0 0x1 &pcie_intc 0x1=
>,
> --
> 2.28.0
>

Applied.
M


--=20
Michal Simek, Ing. (M.Eng), OpenPGP -> KeyID: FE3D1F91
w: www.monstr.eu p: +42-0-721842854
Maintainer of Linux kernel - Xilinx Microblaze
Maintainer of Linux kernel - Xilinx Zynq ARM and ZynqMP ARM64 SoCs
U-Boot custodian - Xilinx Microblaze/Zynq/ZynqMP/Versal SoCs