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From:   Michal Simek <monstr@monstr.eu>
Date:   Wed, 25 Nov 2020 13:29:20 +0100
Message-ID: <CAHTX3d+nGPXgfw=t7+UsEEseFahScus7jjMhKGe+RwMbVweeRQ@mail.gmail.com>
Subject: Re: [PATCH] arm64: dts: zynqmp: Wire mailbox with zynqmp-power driver
To:     LKML <linux-kernel@vger.kernel.org>,
        Michal Simek <monstr@monstr.eu>, git <git@xilinx.com>
Cc:     Kalyani Akula <kalyani.akula@xilinx.com>,
        Krzysztof Kozlowski <krzk@kernel.org>,
        Laurent Pinchart <laurent.pinchart@ideasonboard.com>,
        Manish Narani <manish.narani@xilinx.com>,
        Rajan Vaja <rajan.vaja@xilinx.com>,
        Rob Herring <robh+dt@kernel.org>,
        DTML <devicetree@vger.kernel.org>,
        linux-arm <linux-arm-kernel@lists.infradead.org>
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=C4=8Dt 12. 11. 2020 v 13:52 odes=C3=ADlatel Michal Simek
<michal.simek@xilinx.com> napsal:
>
> The support to driver was added by commit ffdbae28d9d1 ("drivers: soc:
> xilinx: Use mailbox IPI callback") that's why also enable it via DT by
> default. It setups communication with firmware via IPI interface.
>
> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
> ---
>
>  arch/arm64/boot/dts/xilinx/zynqmp.dtsi | 25 +++++++++++++++++++++++++
>  1 file changed, 25 insertions(+)
>
> diff --git a/arch/arm64/boot/dts/xilinx/zynqmp.dtsi b/arch/arm64/boot/dts=
/xilinx/zynqmp.dtsi
> index 66dad22b8a76..68923fbd0e89 100644
> --- a/arch/arm64/boot/dts/xilinx/zynqmp.dtsi
> +++ b/arch/arm64/boot/dts/xilinx/zynqmp.dtsi
> @@ -99,6 +99,29 @@ opp03 {
>                 };
>         };
>
> +       zynqmp_ipi {
> +               compatible =3D "xlnx,zynqmp-ipi-mailbox";
> +               interrupt-parent =3D <&gic>;
> +               interrupts =3D <0 35 4>;
> +               xlnx,ipi-id =3D <0>;
> +               #address-cells =3D <2>;
> +               #size-cells =3D <2>;
> +               ranges;
> +
> +               ipi_mailbox_pmu1: mailbox@ff990400 {
> +                       reg =3D <0x0 0xff9905c0 0x0 0x20>,
> +                             <0x0 0xff9905e0 0x0 0x20>,
> +                             <0x0 0xff990e80 0x0 0x20>,
> +                             <0x0 0xff990ea0 0x0 0x20>;
> +                       reg-names =3D "local_request_region",
> +                                   "local_response_region",
> +                                   "remote_request_region",
> +                                   "remote_response_region";
> +                       #mbox-cells =3D <1>;
> +                       xlnx,ipi-id =3D <4>;
> +               };
> +       };
> +
>         dcc: dcc {
>                 compatible =3D "arm,dcc";
>                 status =3D "disabled";
> @@ -128,6 +151,8 @@ zynqmp_power: zynqmp-power {
>                                 compatible =3D "xlnx,zynqmp-power";
>                                 interrupt-parent =3D <&gic>;
>                                 interrupts =3D <0 35 4>;
> +                               mboxes =3D <&ipi_mailbox_pmu1 0>, <&ipi_m=
ailbox_pmu1 1>;
> +                               mbox-names =3D "tx", "rx";
>                         };
>
>                         zynqmp_clk: clock-controller {
> --
> 2.29.2
>

Applied.
M


--=20
Michal Simek, Ing. (M.Eng), OpenPGP -> KeyID: FE3D1F91
w: www.monstr.eu p: +42-0-721842854
Maintainer of Linux kernel - Xilinx Microblaze
Maintainer of Linux kernel - Xilinx Zynq ARM and ZynqMP ARM64 SoCs
U-Boot custodian - Xilinx Microblaze/Zynq/ZynqMP/Versal SoCs