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From:   Lukasz Majewski <lukma@denx.de>
To:     Fugang Duan <fugang.duan@nxp.com>,
        "David S . Miller" <davem@davemloft.net>,
        Jakub Kicinski <kuba@kernel.org>, netdev@vger.kernel.org,
        Andrew Lunn <andrew@lunn.ch>,
        Fabio Estevam <festevam@gmail.com>,
        Vivien Didelot <vivien.didelot@gmail.com>
Cc:     NXP Linux Team <linux-imx@nxp.com>,
        Florian Fainelli <f.fainelli@gmail.com>,
        Vladimir Oltean <olteanv@gmail.com>,
        linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org,
        Peng Fan <peng.fan@nxp.com>, stefan.agner@toradex.com,
        krzk@kernel.org, Shawn Guo <shawnguo@kernel.org>,
        Lukasz Majewski <lukma@denx.de>
Subject: [RFC 4/4] ARM: dts: imx28: Add description for L2 switch on XEA board
Date:   Thu, 26 Nov 2020 00:24:59 +0100
Message-Id: <20201125232459.378-5-lukma@denx.de>
In-Reply-To: <20201125232459.378-1-lukma@denx.de>
References: <20201125232459.378-1-lukma@denx.de>
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The 'eth_switch' node is now used to enable support for L2 switch.
Moreover, a separate 'switch' node was introduced to keep the code more
clean.

Signed-off-by: Lukasz Majewski <lukma@denx.de>
---
 arch/arm/boot/dts/imx28-xea.dts | 55 +++++++++++++++++++++++++++++++++
 1 file changed, 55 insertions(+)

diff --git a/arch/arm/boot/dts/imx28-xea.dts b/arch/arm/boot/dts/imx28-xea.dts
index 672080485b78..b8a896df02c0 100644
--- a/arch/arm/boot/dts/imx28-xea.dts
+++ b/arch/arm/boot/dts/imx28-xea.dts
@@ -9,6 +9,30 @@
 
 / {
 	model = "XEA";
+
+	switch {
+		compatible = "imx,mtip-l2switch";
+		reg = <0x800f8000 0x400>, <0x800fC000 0x4000>;
+		ports {
+			port0@0 {
+				reg = <0>;
+				label = "lan1";
+				phy-handle = <&ethsw0>;
+			};
+
+			port1@1 {
+				reg = <1>;
+				label = "lan2";
+				phy-handle = <&ethsw1>;
+			};
+
+			port2@2 {
+				reg = <2>;
+				label = "cpu";
+				ethernet = <&eth_switch>;
+			};
+		};
+	};
 };
 
 &can0 {
@@ -23,6 +47,37 @@
 	status = "okay";
 };
 
+&eth_switch {
+	compatible = "fsl,imx28-l2switch";
+	reg = <0x800f0000 0x8000>, <0x800f8400 0x400>;
+	pinctrl-names = "default";
+	pinctrl-0 = <&mac0_pins_a>, <&mac1_pins_a>;
+	phy-mode = "rmii";
+	phy-supply = <&reg_fec_3v3>;
+	phy-reset-gpios = <&gpio2 13 0>;
+	phy-reset-duration = <100>;
+	interrupts = <100>, <101>, <102>;
+	clocks = <&clks 57>, <&clks 57>, <&clks 64>, <&clks 35>;
+	clock-names = "ipg", "ahb", "enet_out", "ptp";
+	local-mac-address = [ 00 11 22 AA BB CC ];
+	status = "okay";
+
+	fixed-link {
+		speed = <100>;
+		full-duplex;
+	};
+
+	mdio {
+		ethsw0: ethernet-phy@0 {
+			reg = <0>;
+		};
+
+		ethsw1: ethernet-phy@1 {
+			reg = <1>;
+		};
+	};
+};
+
 &pinctrl {
 	pinctrl-names = "default";
 	pinctrl-0 = <&hog_pins_a &hog_pins_tiva>;
-- 
2.20.1