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[23.128.96.18]) by mx.google.com with ESMTP id h6si3241602edj.146.2020.11.26.07.55.27; Thu, 26 Nov 2020 07:55:51 -0800 (PST) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) client-ip=23.128.96.18; Authentication-Results: mx.google.com; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=arm.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S2391266AbgKZPtZ (ORCPT + 99 others); Thu, 26 Nov 2020 10:49:25 -0500 Received: from foss.arm.com ([217.140.110.172]:37326 "EHLO foss.arm.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1730181AbgKZPtY (ORCPT ); Thu, 26 Nov 2020 10:49:24 -0500 Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id A539531B; Thu, 26 Nov 2020 07:49:23 -0800 (PST) Received: from [10.57.59.159] (unknown [10.57.59.159]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id 9BC053F23F; Thu, 26 Nov 2020 07:49:20 -0800 (PST) Subject: Re: [PATCH v4 08/24] iommu/io-pgtable-arm-v7s: Extend PA34 for MediaTek To: Yong Wu , Joerg Roedel , Matthias Brugger , Rob Herring , Will Deacon Cc: Krzysztof Kozlowski , Evan Green , Tomasz Figa , linux-mediatek@lists.infradead.org, srv_heupstream@mediatek.com, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, iommu@lists.linux-foundation.org, youlin.pei@mediatek.com, Nicolas Boichat , anan.sun@mediatek.com, chao.hao@mediatek.com, Greg Kroah-Hartman , kernel-team@android.com References: <20201111123838.15682-1-yong.wu@mediatek.com> <20201111123838.15682-9-yong.wu@mediatek.com> From: Robin Murphy Message-ID: Date: Thu, 26 Nov 2020 15:49:19 +0000 User-Agent: Mozilla/5.0 (Windows NT 10.0; rv:78.0) Gecko/20100101 Thunderbird/78.5.0 MIME-Version: 1.0 In-Reply-To: <20201111123838.15682-9-yong.wu@mediatek.com> Content-Type: text/plain; charset=utf-8; format=flowed Content-Language: en-GB Content-Transfer-Encoding: 7bit Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On 2020-11-11 12:38, Yong Wu wrote: > MediaTek extend the bit5 in lvl1 and lvl2 descriptor as PA34. Reviewed-by: Robin Murphy > Signed-off-by: Yong Wu > Acked-by: Will Deacon > --- > drivers/iommu/io-pgtable-arm-v7s.c | 9 +++++++-- > drivers/iommu/mtk_iommu.c | 2 +- > include/linux/io-pgtable.h | 4 ++-- > 3 files changed, 10 insertions(+), 5 deletions(-) > > diff --git a/drivers/iommu/io-pgtable-arm-v7s.c b/drivers/iommu/io-pgtable-arm-v7s.c > index e880745ab1e8..4d0aa079470f 100644 > --- a/drivers/iommu/io-pgtable-arm-v7s.c > +++ b/drivers/iommu/io-pgtable-arm-v7s.c > @@ -112,9 +112,10 @@ > #define ARM_V7S_TEX_MASK 0x7 > #define ARM_V7S_ATTR_TEX(val) (((val) & ARM_V7S_TEX_MASK) << ARM_V7S_TEX_SHIFT) > > -/* MediaTek extend the two bits for PA 32bit/33bit */ > +/* MediaTek extend the bits below for PA 32bit/33bit/34bit */ > #define ARM_V7S_ATTR_MTK_PA_BIT32 BIT(9) > #define ARM_V7S_ATTR_MTK_PA_BIT33 BIT(4) > +#define ARM_V7S_ATTR_MTK_PA_BIT34 BIT(5) > > /* *well, except for TEX on level 2 large pages, of course :( */ > #define ARM_V7S_CONT_PAGE_TEX_SHIFT 6 > @@ -194,6 +195,8 @@ static arm_v7s_iopte paddr_to_iopte(phys_addr_t paddr, int lvl, > pte |= ARM_V7S_ATTR_MTK_PA_BIT32; > if (paddr & BIT_ULL(33)) > pte |= ARM_V7S_ATTR_MTK_PA_BIT33; > + if (paddr & BIT_ULL(34)) > + pte |= ARM_V7S_ATTR_MTK_PA_BIT34; > return pte; > } > > @@ -218,6 +221,8 @@ static phys_addr_t iopte_to_paddr(arm_v7s_iopte pte, int lvl, > paddr |= BIT_ULL(32); > if (pte & ARM_V7S_ATTR_MTK_PA_BIT33) > paddr |= BIT_ULL(33); > + if (pte & ARM_V7S_ATTR_MTK_PA_BIT34) > + paddr |= BIT_ULL(34); > return paddr; > } > > @@ -754,7 +759,7 @@ static struct io_pgtable *arm_v7s_alloc_pgtable(struct io_pgtable_cfg *cfg, > if (cfg->ias > ARM_V7S_ADDR_BITS) > return NULL; > > - if (cfg->oas > (arm_v7s_is_mtk_enabled(cfg) ? 34 : ARM_V7S_ADDR_BITS)) > + if (cfg->oas > (arm_v7s_is_mtk_enabled(cfg) ? 35 : ARM_V7S_ADDR_BITS)) > return NULL; > > if (cfg->quirks & ~(IO_PGTABLE_QUIRK_ARM_NS | > diff --git a/drivers/iommu/mtk_iommu.c b/drivers/iommu/mtk_iommu.c > index 6451d83753e1..ec3c87d4b172 100644 > --- a/drivers/iommu/mtk_iommu.c > +++ b/drivers/iommu/mtk_iommu.c > @@ -320,7 +320,7 @@ static int mtk_iommu_domain_finalise(struct mtk_iommu_domain *dom) > IO_PGTABLE_QUIRK_ARM_MTK_EXT, > .pgsize_bitmap = mtk_iommu_ops.pgsize_bitmap, > .ias = 32, > - .oas = 34, > + .oas = 35, > .tlb = &mtk_iommu_flush_ops, > .iommu_dev = data->dev, > }; > diff --git a/include/linux/io-pgtable.h b/include/linux/io-pgtable.h > index 4cde111e425b..1ae0757f4f94 100644 > --- a/include/linux/io-pgtable.h > +++ b/include/linux/io-pgtable.h > @@ -77,8 +77,8 @@ struct io_pgtable_cfg { > * TLB maintenance when mapping as well as when unmapping. > * > * IO_PGTABLE_QUIRK_ARM_MTK_EXT: (ARM v7s format) MediaTek IOMMUs extend > - * to support up to 34 bits PA where the bit32 and bit33 are > - * encoded in the bit9 and bit4 of the PTE respectively. > + * to support up to 35 bits PA where the bit32, bit33 and bit34 are > + * encoded in the bit9, bit4 and bit5 of the PTE respectively. > * > * IO_PGTABLE_QUIRK_NON_STRICT: Skip issuing synchronous leaf TLBIs > * on unmap, for DMA domains using the flush queue mechanism for >