Received: by 2002:a05:6a10:f347:0:0:0:0 with SMTP id d7csp728110pxu; Thu, 26 Nov 2020 10:07:43 -0800 (PST) X-Google-Smtp-Source: ABdhPJwC/J+fUh+DU5Dgzlg6rGwQpdiPxZIH2D5BAKkA3Rj9PUc6ThVkULROI8rF1BExm8jAjl20 X-Received: by 2002:a50:d4c1:: with SMTP id e1mr2825183edj.388.1606414063545; Thu, 26 Nov 2020 10:07:43 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1606414063; cv=none; d=google.com; s=arc-20160816; b=vdxAkuvmviMrsAyfAc75AtUwMA8Ql+HYUF7LQLxTBpDW6z/0+t7siMgV/kpRVTI7Uw kF51wpQi+t01CO3I47TurL3LUCB6W02ecojOVBdwErFD4EQs5KlAnpvn1BFnI1PsUVVu X18C2czaIctbGlNUE6vGW+Em1dNGh+ChZUadBnUkxlK16w0eNTnulmJF4TqtMAR8nhnD FfS+GhuN/aUAQ0FZTpp5cUDOo5aNDqgXQfAhOvNSn+uSFkVhGtS8D6MY09xYFq92pTwS JBRiasYzG6siJsBaaqFZrdCsJTsDPSrm8NOb2iNVlsjiwaTdZwCg0mSLVFH6vA01AgVN T4Ww== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:dkim-signature:mime-version:references :in-reply-to:message-id:date:subject:cc:to:from; bh=N3YeQvDKJduX5rcoNDcv6iWQ9sjVvrYYOtuEvh0ZCJo=; b=cLPhPoy6FMGA6ENLKb4I0vUaxs7I3YN403bzNYoYcngrpINvgIWkdNx0N/t7MofVfd EvP9rkdtz9sr2VrxoHa12j/9gwFxsibgCpICgTgbdWxm3KpMBLjugjKU6LSvxeknCkWY WMojMt4zrqljC4xHKk0M9mkEy+3K6rM6RyO1nkEKpV3oAaAZ5DWqBpXPgH0fKHsnFCyp KLpwP5oE6IyIzfva9YCteQUJ7rESDqQMKwSPJ6fBvWrT7avyJJ+eHdCSotbMCFrVKy3Y WemSiCWfntDHfx58yixv6nR35Pxd1YbzsScpXO6TVvPZtV6ezlHi3kvUjMPENudRUY08 m6nQ== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@nvidia.com header.s=n1 header.b=WUY4DGsC; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=nvidia.com Return-Path: Received: from vger.kernel.org (vger.kernel.org. [23.128.96.18]) by mx.google.com with ESMTP id o3si3305441ejn.637.2020.11.26.10.07.20; Thu, 26 Nov 2020 10:07:43 -0800 (PST) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) client-ip=23.128.96.18; Authentication-Results: mx.google.com; dkim=pass header.i=@nvidia.com header.s=n1 header.b=WUY4DGsC; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=nvidia.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S2404723AbgKZSEI (ORCPT + 99 others); Thu, 26 Nov 2020 13:04:08 -0500 Received: from hqnvemgate24.nvidia.com ([216.228.121.143]:1976 "EHLO hqnvemgate24.nvidia.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S2404611AbgKZSEI (ORCPT ); Thu, 26 Nov 2020 13:04:08 -0500 Received: from hqmail.nvidia.com (Not Verified[216.228.121.13]) by hqnvemgate24.nvidia.com (using TLS: TLSv1.2, AES256-SHA) id ; Thu, 26 Nov 2020 10:04:15 -0800 Received: from HQMAIL109.nvidia.com (172.20.187.15) by HQMAIL101.nvidia.com (172.20.187.10) with Microsoft SMTP Server (TLS) id 15.0.1473.3; Thu, 26 Nov 2020 18:04:07 +0000 Received: from audio.nvidia.com (172.20.13.39) by mail.nvidia.com (172.20.187.15) with Microsoft SMTP Server id 15.0.1473.3 via Frontend Transport; Thu, 26 Nov 2020 18:04:04 +0000 From: Sameer Pujar To: , , CC: , , , , , , , Sameer Pujar Subject: [PATCH v6 5/6] arm64: tegra: Audio graph header for Tegra210 Date: Thu, 26 Nov 2020 23:33:42 +0530 Message-ID: <1606413823-19885-6-git-send-email-spujar@nvidia.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1606413823-19885-1-git-send-email-spujar@nvidia.com> References: <1606413823-19885-1-git-send-email-spujar@nvidia.com> MIME-Version: 1.0 Content-Type: text/plain DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=nvidia.com; s=n1; t=1606413855; bh=N3YeQvDKJduX5rcoNDcv6iWQ9sjVvrYYOtuEvh0ZCJo=; h=From:To:CC:Subject:Date:Message-ID:X-Mailer:In-Reply-To: References:MIME-Version:Content-Type; b=WUY4DGsCTlrykjqCn6l2npjLbmjJX2I5BY2ioJ5L1opGSJ0PmQyVIBkK1vmncvwjv d8HQ05wC48mg8VKR+B4rfFQngcMSwRD8n+0FPMMiDbGkdXRrFQKmMsJG/z43gCjPwh TrGTAiJ1Snbqhtqvf2MaMEzgZs/Vm0jPXQM5iRIyhP3jVVgR0jioJY+uXFDFXXCPqk 0VozP8lsDHiFWggA+KRp8yC6gb0/d2UJzCvJIW1mm3NrTCTcU9s4VY6OENZXxSKBav koqawNys+jiEV9NK2USzAxfo9cg6pYQA97OWUf+Y5n5fApLYj/8o5dPiQpWHumOfmk nFDFrxZFzp13Q== Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Expose a header which describes DT bindings required to use audio-graph based sound card. All Tegra210 based platforms can include this header and add platform specific information. Currently, from SoC point of view, all links are exposed for ADMAIF, AHUB, I2S and DMIC components. Signed-off-by: Sameer Pujar Reviewed-by: Jon Hunter --- .../boot/dts/nvidia/tegra210-audio-graph.dtsi | 153 +++++++++++++++++++++ 1 file changed, 153 insertions(+) create mode 100644 arch/arm64/boot/dts/nvidia/tegra210-audio-graph.dtsi diff --git a/arch/arm64/boot/dts/nvidia/tegra210-audio-graph.dtsi b/arch/arm64/boot/dts/nvidia/tegra210-audio-graph.dtsi new file mode 100644 index 0000000..5c54358 --- /dev/null +++ b/arch/arm64/boot/dts/nvidia/tegra210-audio-graph.dtsi @@ -0,0 +1,153 @@ +// SPDX-License-Identifier: GPL-2.0 + +/ { + tegra_sound { + status = "disabled"; + + clocks = <&tegra_car TEGRA210_CLK_PLL_A>, + <&tegra_car TEGRA210_CLK_PLL_A_OUT0>; + clock-names = "pll_a", "plla_out0"; + + assigned-clocks = <&tegra_car TEGRA210_CLK_PLL_A>, + <&tegra_car TEGRA210_CLK_PLL_A_OUT0>, + <&tegra_car TEGRA210_CLK_EXTERN1>; + assigned-clock-parents = <0>, <0>, <&tegra_car TEGRA210_CLK_PLL_A_OUT0>; + assigned-clock-rates = <368640000>, <49152000>, <12288000>; + }; +}; + +&tegra_admaif { + ports { + #address-cells = <1>; + #size-cells = <0>; + + admaif1_port: port@0 { + reg = <0>; + admaif1_ep: endpoint { + remote-endpoint = <&xbar_admaif1_ep>; + }; + }; + admaif2_port: port@1 { + reg = <1>; + admaif2_ep: endpoint { + remote-endpoint = <&xbar_admaif2_ep>; + }; + }; + admaif3_port: port@2 { + reg = <2>; + admaif3_ep: endpoint { + remote-endpoint = <&xbar_admaif3_ep>; + }; + }; + admaif4_port: port@3 { + reg = <3>; + admaif4_ep: endpoint { + remote-endpoint = <&xbar_admaif4_ep>; + }; + }; + admaif5_port: port@4 { + reg = <4>; + admaif5_ep: endpoint { + remote-endpoint = <&xbar_admaif5_ep>; + }; + }; + admaif6_port: port@5 { + reg = <5>; + admaif6_ep: endpoint { + remote-endpoint = <&xbar_admaif6_ep>; + }; + }; + admaif7_port: port@6 { + reg = <6>; + admaif7_ep: endpoint { + remote-endpoint = <&xbar_admaif7_ep>; + }; + }; + admaif8_port: port@7 { + reg = <7>; + admaif8_ep: endpoint { + remote-endpoint = <&xbar_admaif8_ep>; + }; + }; + admaif9_port: port@8 { + reg = <8>; + admaif9_ep: endpoint { + remote-endpoint = <&xbar_admaif9_ep>; + }; + }; + admaif10_port: port@9 { + reg = <9>; + admaif10_ep: endpoint { + remote-endpoint = <&xbar_admaif10_ep>; + }; + }; + }; +}; + +&tegra_ahub { + ports { + #address-cells = <1>; + #size-cells = <0>; + + port@0 { + reg = <0x0>; + xbar_admaif1_ep: endpoint { + remote-endpoint = <&admaif1_ep>; + }; + }; + port@1 { + reg = <0x1>; + xbar_admaif2_ep: endpoint { + remote-endpoint = <&admaif2_ep>; + }; + }; + port@2 { + reg = <0x2>; + xbar_admaif3_ep: endpoint { + remote-endpoint = <&admaif3_ep>; + }; + }; + port@3 { + reg = <0x3>; + xbar_admaif4_ep: endpoint { + remote-endpoint = <&admaif4_ep>; + }; + }; + port@4 { + reg = <0x4>; + xbar_admaif5_ep: endpoint { + remote-endpoint = <&admaif5_ep>; + }; + }; + port@5 { + reg = <0x5>; + xbar_admaif6_ep: endpoint { + remote-endpoint = <&admaif6_ep>; + }; + }; + port@6 { + reg = <0x6>; + xbar_admaif7_ep: endpoint { + remote-endpoint = <&admaif7_ep>; + }; + }; + port@7 { + reg = <0x7>; + xbar_admaif8_ep: endpoint { + remote-endpoint = <&admaif8_ep>; + }; + }; + port@8 { + reg = <0x8>; + xbar_admaif9_ep: endpoint { + remote-endpoint = <&admaif9_ep>; + }; + }; + port@9 { + reg = <0x9>; + xbar_admaif10_ep: endpoint { + remote-endpoint = <&admaif10_ep>; + }; + }; + }; +}; -- 2.7.4