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Date:   Sun, 29 Nov 2020 20:09:13 +0200
From:   Cristian Ciocaltea <cristian.ciocaltea@gmail.com>
To:     Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Cc:     Rob Herring <robh+dt@kernel.org>,
        Andreas =?iso-8859-1?Q?F=E4rber?= <afaerber@suse.de>,
        devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org,
        linux-actions@lists.infradead.org, linux-kernel@vger.kernel.org
Subject: Re: [PATCH v2 02/18] arm: dts: owl-s500: Set CMU clocks for UARTs
Message-ID: <20201129180913.GB696261@BV030612LT>
References: <cover.1605823502.git.cristian.ciocaltea@gmail.com>
 <1bd42cf44e5aaef1bb7e97e4e344444ddbfbb091.1605823502.git.cristian.ciocaltea@gmail.com>
 <20201128072513.GQ3077@thinkpad>
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In-Reply-To: <20201128072513.GQ3077@thinkpad>
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On Sat, Nov 28, 2020 at 12:55:13PM +0530, Manivannan Sadhasivam wrote:
> On Fri, Nov 20, 2020 at 01:55:56AM +0200, Cristian Ciocaltea wrote:
> > Set Clock Management Unit clocks for the UART nodes of Actions Semi
> > S500 SoCs.
> > 
> > Signed-off-by: Cristian Ciocaltea <cristian.ciocaltea@gmail.com>
> 
> Also in this patch itself, you need to remove the dummy "uart3_clk" from
> S500 dts. With that,

I have prepared the updated patch with the requested changes, including
also the merge of the RoseapplePi related patch (no. 15 in this series).

Thanks,
Cristi

> Reviewed-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
> 
> Thanks,
> Mani
> 
> > ---
> >  arch/arm/boot/dts/owl-s500.dtsi | 7 +++++++
> >  1 file changed, 7 insertions(+)
> > 
> > diff --git a/arch/arm/boot/dts/owl-s500.dtsi b/arch/arm/boot/dts/owl-s500.dtsi
> > index 5d5ad9db549b..ac3d04c75dd5 100644
> > --- a/arch/arm/boot/dts/owl-s500.dtsi
> > +++ b/arch/arm/boot/dts/owl-s500.dtsi
> > @@ -131,6 +131,7 @@ uart0: serial@b0120000 {
> >  			compatible = "actions,s500-uart", "actions,owl-uart";
> >  			reg = <0xb0120000 0x2000>;
> >  			interrupts = <GIC_SPI 29 IRQ_TYPE_LEVEL_HIGH>;
> > +			clocks = <&cmu CLK_UART0>;
> >  			status = "disabled";
> >  		};
> >  
> > @@ -138,6 +139,7 @@ uart1: serial@b0122000 {
> >  			compatible = "actions,s500-uart", "actions,owl-uart";
> >  			reg = <0xb0122000 0x2000>;
> >  			interrupts = <GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH>;
> > +			clocks = <&cmu CLK_UART1>;
> >  			status = "disabled";
> >  		};
> >  
> > @@ -145,6 +147,7 @@ uart2: serial@b0124000 {
> >  			compatible = "actions,s500-uart", "actions,owl-uart";
> >  			reg = <0xb0124000 0x2000>;
> >  			interrupts = <GIC_SPI 31 IRQ_TYPE_LEVEL_HIGH>;
> > +			clocks = <&cmu CLK_UART2>;
> >  			status = "disabled";
> >  		};
> >  
> > @@ -152,6 +155,7 @@ uart3: serial@b0126000 {
> >  			compatible = "actions,s500-uart", "actions,owl-uart";
> >  			reg = <0xb0126000 0x2000>;
> >  			interrupts = <GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>;
> > +			clocks = <&cmu CLK_UART3>;
> >  			status = "disabled";
> >  		};
> >  
> > @@ -159,6 +163,7 @@ uart4: serial@b0128000 {
> >  			compatible = "actions,s500-uart", "actions,owl-uart";
> >  			reg = <0xb0128000 0x2000>;
> >  			interrupts = <GIC_SPI 33 IRQ_TYPE_LEVEL_HIGH>;
> > +			clocks = <&cmu CLK_UART4>;
> >  			status = "disabled";
> >  		};
> >  
> > @@ -166,6 +171,7 @@ uart5: serial@b012a000 {
> >  			compatible = "actions,s500-uart", "actions,owl-uart";
> >  			reg = <0xb012a000 0x2000>;
> >  			interrupts = <GIC_SPI 34 IRQ_TYPE_LEVEL_HIGH>;
> > +			clocks = <&cmu CLK_UART5>;
> >  			status = "disabled";
> >  		};
> >  
> > @@ -173,6 +179,7 @@ uart6: serial@b012c000 {
> >  			compatible = "actions,s500-uart", "actions,owl-uart";
> >  			reg = <0xb012c000 0x2000>;
> >  			interrupts = <GIC_SPI 35 IRQ_TYPE_LEVEL_HIGH>;
> > +			clocks = <&cmu CLK_UART6>;
> >  			status = "disabled";
> >  		};
> >  
> > -- 
> > 2.29.2
> >