Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) client-ip=23.128.96.18;
Subject: Re: [PATCH] dmaengine: tegra-apb: fix reference leak in
 tegra_dma_issue_pending and tegra_dma_synchronize
To:     Qinglang Miao <miaoqinglang@huawei.com>,
        Laxman Dewangan <ldewangan@nvidia.com>,
        Vinod Koul <vkoul@kernel.org>,
        Dan Williams <dan.j.williams@intel.com>,
        Thierry Reding <thierry.reding@gmail.com>
CC:     <dmaengine@vger.kernel.org>, <linux-tegra@vger.kernel.org>,
        <linux-kernel@vger.kernel.org>
References: <20201127094431.120771-1-miaoqinglang@huawei.com>
From:   Jon Hunter <jonathanh@nvidia.com>
Message-ID: <b7871cf9-9f3e-1b8e-028b-73bd703411f7@nvidia.com>
Date:   Mon, 30 Nov 2020 11:12:45 +0000
User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:68.0) Gecko/20100101
 Thunderbird/68.10.0
MIME-Version: 1.0
In-Reply-To: <20201127094431.120771-1-miaoqinglang@huawei.com>
Content-Type: text/plain; charset="utf-8"
Content-Language: en-US
Content-Transfer-Encoding: 7bit
Precedence: bulk


On 27/11/2020 09:44, Qinglang Miao wrote:
> pm_runtime_get_sync will increment pm usage counter even it
> failed. Forgetting to putting operation will result in a
> reference leak here.
> 
> A new function pm_runtime_resume_and_get is introduced in
> [0] to keep usage counter balanced. So We fix the reference
> leak by replacing it with new funtion.
> 
> [0] dd8088d5a896 ("PM: runtime: Add  pm_runtime_resume_and_get to deal with usage counter")
> 
> Fixes: 84a3f375eea9 ("dmaengine: tegra-apb: Keep clock enabled only during of DMA transfer")
> Fixes: 664475cffb8c ("dmaengine: tegra-apb: Ensure that clock is enabled during of DMA synchronization")
> Reported-by: Hulk Robot <hulkci@huawei.com>
> Signed-off-by: Qinglang Miao <miaoqinglang@huawei.com>
> ---
>  drivers/dma/tegra20-apb-dma.c | 4 ++--
>  1 file changed, 2 insertions(+), 2 deletions(-)
>
> diff --git a/drivers/dma/tegra20-apb-dma.c b/drivers/dma/tegra20-apb-dma.c
> index 71827d9b0..b7260749e 100644
> --- a/drivers/dma/tegra20-apb-dma.c
> +++ b/drivers/dma/tegra20-apb-dma.c
> @@ -723,7 +723,7 @@ static void tegra_dma_issue_pending(struct dma_chan *dc)
>  		goto end;
>  	}
>  	if (!tdc->busy) {
> -		err = pm_runtime_get_sync(tdc->tdma->dev);
> +		err = pm_runtime_resume_and_get(tdc->tdma->dev);
>  		if (err < 0) {
>  			dev_err(tdc2dev(tdc), "Failed to enable DMA\n");
>  			goto end;
> @@ -818,7 +818,7 @@ static void tegra_dma_synchronize(struct dma_chan *dc)
>  	struct tegra_dma_channel *tdc = to_tegra_dma_chan(dc);
>  	int err;
>  
> -	err = pm_runtime_get_sync(tdc->tdma->dev);
> +	err = pm_runtime_resume_and_get(tdc->tdma->dev);
>  	if (err < 0) {
>  		dev_err(tdc2dev(tdc), "Failed to synchronize DMA: %d\n", err);
>  		return;


Reviewed-by: Jon Hunter <jonathanh@nvidia.com>

Cheers
Jon

-- 
nvpublic