Received: by 2002:a05:6a10:f347:0:0:0:0 with SMTP id d7csp4349933pxu; Tue, 1 Dec 2020 02:44:05 -0800 (PST) X-Google-Smtp-Source: ABdhPJyz/lBfqGfv7yAqwcjm8iZAD+HqD/j+WYd/z9WDo90scXu5poOr9v985dm0WPx9ZDOzhXzf X-Received: by 2002:a17:906:234d:: with SMTP id m13mr2422072eja.270.1606819445006; Tue, 01 Dec 2020 02:44:05 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1606819445; cv=none; d=google.com; s=arc-20160816; b=pJpVwdLlm7ako+65755v6NqFQBFwijtKsl6mjDRtJHDyEkzKyVoopHwIDeyQGhtJD2 UWSpyP424VbGme0L9pWJ/MPjMB+RwyGQPPMFjDkonKggRvgLDtbK2H9agbB0CXBI5KuA 4vbap+5GpUVm7LrtQpXYzx3bCmPeihQIH2QYs1mtwwl3bAWW43rzvKglJA3RGeml9G54 NwGSdKmY0Dz2eGMDVsaj1ctIa6PBb+mPfwcoqod2EBdPAZq3BXW1K63vmFjNk/s/83Xy qsjd1fJE2DQ9sKrsSyqazdpmT8j0lx6E5kKUhcBY2NkdqYNGhu+0jLeTJdauuVgLyN/l pDMQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from; bh=9oSecVjhPU1ZCm/zRHyPpEwXR67qgLFQKpCRa3FdPXw=; b=siQoYHoI1QtAxfso7LhzSR9lhqI160/D+pyWUf0D3hy1lY2YK46STSTRPurGakEcHY sMJf0ovieGYBd3AnCDulKEXuGH8ZP5FeNgGlvN3PHzwaznRbKkoq5YnioG4gNoLBwo0f UranhAnomrheoLZglmlJAfRJFkPY4tMizfv8KW6qMC3wUAJVTDrbANUtxHzAhs42CC+a AZ19LQRuPRi4oJV81dtyGLpTRY88nhqArdm0xfGivqGIrScfUf7Xw+XTow0ZqZI8MVBp MEhhcPBCPIqiOZzo7nAsX5q9inTACIWmOiJowZxnf3Kok1tVDph0l/JqWfQ1jRN6A/4V cJOQ== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=arm.com Return-Path: Received: from vger.kernel.org (vger.kernel.org. [23.128.96.18]) by mx.google.com with ESMTP id b5si892092edz.214.2020.12.01.02.43.40; Tue, 01 Dec 2020 02:44:04 -0800 (PST) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) client-ip=23.128.96.18; Authentication-Results: mx.google.com; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=arm.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1730145AbgLAKkV (ORCPT + 99 others); Tue, 1 Dec 2020 05:40:21 -0500 Received: from foss.arm.com ([217.140.110.172]:40390 "EHLO foss.arm.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726826AbgLAKkV (ORCPT ); Tue, 1 Dec 2020 05:40:21 -0500 Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 962D5101E; Tue, 1 Dec 2020 02:39:35 -0800 (PST) Received: from red-moon.arm.com (unknown [10.57.32.106]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id 9DF723F66B; Tue, 1 Dec 2020 02:39:32 -0800 (PST) From: Lorenzo Pieralisi To: Vidya Sagar , robh@kernel.org, thierry.reding@gmail.com, kw@linux.com, jingoohan1@gmail.com, gregkh@linuxfoundation.org, jonathanh@nvidia.com, bhelgaas@google.com, amanharitsh123@gmail.com Cc: Lorenzo Pieralisi , sagar.tv@gmail.com, kthota@nvidia.com, linux-pci@vger.kernel.org, linux-tegra@vger.kernel.org, mmaddireddy@nvidia.com, linux-kernel@vger.kernel.org Subject: Re: [PATCH] PCI: tegra: Read "dbi" base address to program in application logic Date: Tue, 1 Dec 2020 10:39:21 +0000 Message-Id: <160681913010.4714.1633762754404351653.b4-ty@arm.com> X-Mailer: git-send-email 2.26.1 In-Reply-To: <20201125192554.5401-1-vidyas@nvidia.com> References: <20201125192554.5401-1-vidyas@nvidia.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Thu, 26 Nov 2020 00:55:54 +0530, Vidya Sagar wrote: > PCIe controller in Tegra194 requires the "dbi" region base address to be > programmed in one of the application logic registers to enable CPU access > to the "dbi" region. But, commit a0fd361db8e5 ("PCI: dwc: Move "dbi", > "dbi2", and "addr_space" resource setup into common code") moved the code > that reads the whereabouts of "dbi" region to the common code causing the > existing code in pcie-tegra194.c file to program NULL in the application > logic registers. This is causing null pointer dereference when the "dbi" > registers are accessed. This issue is fixed by explicitly reading the > "dbi" base address from DT node. Applied to pci/dwc, thanks! [1/1] PCI: tegra: Read "dbi" base address to program in application logic https://git.kernel.org/lpieralisi/pci/c/d5353c00cf Thanks, Lorenzo