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[23.128.96.18]) by mx.google.com with ESMTP id s16si611113edt.488.2020.12.01.12.18.04; Tue, 01 Dec 2020 12:18:27 -0800 (PST) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) client-ip=23.128.96.18; Authentication-Results: mx.google.com; dkim=pass header.i=@broadcom.com header.s=google header.b=XkoCmpKy; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=QUARANTINE sp=QUARANTINE dis=NONE) header.from=broadcom.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1730484AbgLAUNu (ORCPT + 99 others); Tue, 1 Dec 2020 15:13:50 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:43198 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1730533AbgLAUNs (ORCPT ); Tue, 1 Dec 2020 15:13:48 -0500 Received: from mail-wm1-x343.google.com (mail-wm1-x343.google.com [IPv6:2a00:1450:4864:20::343]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id D7601C0617A6 for ; Tue, 1 Dec 2020 12:13:07 -0800 (PST) Received: by mail-wm1-x343.google.com with SMTP id 3so9136100wmg.4 for ; Tue, 01 Dec 2020 12:13:07 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=broadcom.com; s=google; h=mime-version:references:in-reply-to:from:date:message-id:subject:to :cc; bh=xxXPp0Gfj5n7IBRUn22uZpJhktCf0H26FzScuHt2U84=; b=XkoCmpKyUqVxWjTsIia5O7lk++L91iJIMKK+BR/SABxCmwjKSlTU4tEUaidQ9yQWW8 /N0DDONsDAp+NSJkJ6OneAHRtRbRQxhU86xCXDI6YOpBCKe5McTAG+FhZqmoTX6J3hU8 efEVq/n1tk2FsrPsIogagaMxNBR6ksvl5PrNI= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:mime-version:references:in-reply-to:from:date :message-id:subject:to:cc; bh=xxXPp0Gfj5n7IBRUn22uZpJhktCf0H26FzScuHt2U84=; b=GqCs9YW5ipzriTRnCH/wcgyy75BGGG5ZBc1Wx2OjHuYq2Sw5lZo4jq7bi/PeQbAZpO 8cVgmexfmzf3Qku4EMcT3cWI9rD8Qd0jJhSQqk4ipT3q/Jq6brN9ek6moMUjM6jmfO3y ryswn2zI/jlRPAbZHPG7SfdVldltSSdiUn7x424kjFFxpF72U0GGXHgYu7MXa82v85rM JBeKr/JGxxClucw8JqBkbhRRPdQAjyH5ol02kmsIvS+KBhO0g+jfDGlamGf87WhZvZbJ DZsc0oRTERLEfYhZMHdhmHI+PeVLP3qnY/o078nn+itR/WMBOf6RFyN7/gU1riU26eAY ZYlg== X-Gm-Message-State: AOAM533Hqb0xVuZwWF+YvcHkPPhwL4vNvfbztFQjHLviE5AcS7xvd90J 7BRBzebRcDF1CAalbGWha+wN6qkzx8iR9Z9DLHlkRg== X-Received: by 2002:a7b:c157:: with SMTP id z23mr4505630wmi.35.1606853586071; Tue, 01 Dec 2020 12:13:06 -0800 (PST) MIME-Version: 1.0 References: <20201130211145.3012-6-james.quinlan@broadcom.com> <20201201180503.GA1321042@bjorn-Precision-5520> In-Reply-To: <20201201180503.GA1321042@bjorn-Precision-5520> From: Jim Quinlan Date: Tue, 1 Dec 2020 15:12:54 -0500 Message-ID: Subject: Re: [PATCH v2 5/6] PCI: brcmstb: Add panic/die handler to RC driver To: Bjorn Helgaas Cc: "open list:PCI NATIVE HOST BRIDGE AND ENDPOINT DRIVERS" , Nicolas Saenz Julienne , Mark Brown , "maintainer:BROADCOM BCM7XXX ARM ARCHITECTURE" , Lorenzo Pieralisi , Rob Herring , Bjorn Helgaas , Florian Fainelli , "moderated list:BROADCOM BCM2711/BCM2835 ARM ARCHITECTURE" , "moderated list:BROADCOM BCM2711/BCM2835 ARM ARCHITECTURE" , open list Content-Type: multipart/signed; protocol="application/pkcs7-signature"; micalg=sha-256; boundary="0000000000003f5a6905b56cc175" Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org --0000000000003f5a6905b56cc175 Content-Type: text/plain; charset="UTF-8" On Tue, Dec 1, 2020 at 1:05 PM Bjorn Helgaas wrote: > > On Mon, Nov 30, 2020 at 04:11:42PM -0500, Jim Quinlan wrote: > > Whereas most PCIe HW returns 0xffffffff on illegal accesses and the like, > > by default Broadcom's STB PCIe controller effects an abort. This simple > > handler determines if the PCIe controller was the cause of the abort and if > > so, prints out diagnostic info. > > What happens during enumeration? pci_bus_generic_read_dev_vendor_id() > assumes a read of Vendor ID returns 0xffffffff if the device doesn't > exist. > > I assume this case doesn't cause the abort you're referring to here, > or nothing would work. I think this enumeration case results in PCIe > Unsupported Request errors (PCIe r5.0, sec 2.3.2 implementation note). Hi Bjorn, Yes, our controller makes a special case to allow for config-space accesses to the dev_id and vendor_id registers. even if the device is missing. That being said, it will abort on any access if the link is down. However, the 7216-type SOCs bring PCIe error-reporting HW but also have a mode where 0xffffffff is returned on improper accesses, just like many other controllers. We are debating whether we should turn this on by default. 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