Received: by 2002:a05:6a10:f347:0:0:0:0 with SMTP id d7csp401520pxu; Tue, 1 Dec 2020 14:19:52 -0800 (PST) X-Google-Smtp-Source: ABdhPJxu0w79n/AHdqGGK8DZzs/woeBqsVksnpcMV/LbiLcS+puitXsfiH5C4Upvt9F9VaW58iDG X-Received: by 2002:a17:906:2e55:: with SMTP id r21mr5363546eji.46.1606861192618; Tue, 01 Dec 2020 14:19:52 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1606861192; cv=none; d=google.com; s=arc-20160816; b=iIpmR7Nf2fSAIet8SKH/RIw0z7NIaa4F+dLF3SeMxT6ACn9fIhdQVyxD1rVJfFWCOY ZeaqYhqiuWInBF/+cAunj9wEWkGHFBoYpk2D18d4lcqNhPh+L9UaByrdYILIf1Szg/IU 1kwnaNNV1zjLIwDaI/Y+XhLj7v0f5uzrlmUEi+UPyoZCTaME4JrwLj5wpH4WjFwQCxkY EtiPCFcgvKGuOj5k/A8x2cs+RePSYI681BdNh/phT5FvKAQwmmwRzm9OGGGYxkWL9SGk ykljDFg9VXxjo1RrO24DxvB+QPqAYIEvJ0Od/KFlFxBnlCG1QtNh7daKrXPfgOfChViY 05Qw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-language:content-transfer-encoding :in-reply-to:mime-version:user-agent:date:message-id:from:references :cc:to:subject; bh=IkRTicJps13pb4jwsTCHuOKUulpob9gEOyYjKhuTzbc=; b=nWURFiIyjsabZOCby80ZM9hIHFZMXGjzzniEDTYoc7tzPhFPad14bqfTBwiL70y+uk vfIPg5cQm6A0OYmYz5OsjQCMVlWfH13Lv8vJCPH1Vnj9zkhAneJQu1UM/BgOJaGJjf5i xPbnJIO0GlpsFs1RvoWV2X/XBFgq9SOrm6o2RVGC7+W3/Mk1Y++CLeCMb/FtxCWF1uf0 hwwJ8KK6fmjoGrRdwNnOErxby4t7O6AnTiqVlVbSNr+Ty9cpfgBbXxWhM/Z2XAPC93+J 95Rzkw/Jaeo1vXlepa/HVRbS0KxUyaNwX5ormKAksMr+GIb07ybuX9mcKMuHO/kHY+L0 EvDA== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [23.128.96.18]) by mx.google.com with ESMTP id b1si791579edy.429.2020.12.01.14.19.30; Tue, 01 Dec 2020 14:19:52 -0800 (PST) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) client-ip=23.128.96.18; Authentication-Results: mx.google.com; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S2388280AbgLAJAT (ORCPT + 99 others); Tue, 1 Dec 2020 04:00:19 -0500 Received: from szxga05-in.huawei.com ([45.249.212.191]:9079 "EHLO szxga05-in.huawei.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S2387613AbgLAJAP (ORCPT ); Tue, 1 Dec 2020 04:00:15 -0500 Received: from DGGEMS408-HUB.china.huawei.com (unknown [172.30.72.60]) by szxga05-in.huawei.com (SkyGuard) with ESMTP id 4Clbcf2FrYzLvK7; Tue, 1 Dec 2020 16:58:58 +0800 (CST) Received: from [127.0.0.1] (10.57.22.126) by DGGEMS408-HUB.china.huawei.com (10.3.19.208) with Microsoft SMTP Server id 14.3.487.0; Tue, 1 Dec 2020 16:59:21 +0800 Subject: Re: [PATCH v1] gpio: dwapb: mask/unmask IRQ when disable/enable it To: Andy Shevchenko CC: , , , , , References: <1606728979-44259-1-git-send-email-luojiaxing@huawei.com> <20201130112250.GK4077@smile.fi.intel.com> From: luojiaxing Message-ID: <63f7dcc4-a924-515a-2fea-31ec80f3353e@huawei.com> Date: Tue, 1 Dec 2020 16:59:21 +0800 User-Agent: Mozilla/5.0 (Windows NT 6.1; WOW64; rv:60.0) Gecko/20100101 Thunderbird/60.2.1 MIME-Version: 1.0 In-Reply-To: <20201130112250.GK4077@smile.fi.intel.com> Content-Type: text/plain; charset="utf-8"; format=flowed Content-Transfer-Encoding: 8bit Content-Language: en-US X-Originating-IP: [10.57.22.126] X-CFilter-Loop: Reflected Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On 2020/11/30 19:22, Andy Shevchenko wrote: > On Mon, Nov 30, 2020 at 05:36:19PM +0800, Luo Jiaxing wrote: >> The mask and unmask registers are not configured in dwapb_irq_enable() and >> dwapb_irq_disable(). In the following situations, the IRQ will be masked by >> default after the IRQ is enabled: >> >> mask IRQ -> disable IRQ -> enable IRQ >> >> In this case, the IRQ status of GPIO controller is inconsistent with it's >> irq_data too. For example, in __irq_enable(), IRQD_IRQ_DISABLED and >> IRQD_IRQ_MASKED are both clear, but GPIO controller do not perform unmask. > Sounds a bit like a papering over the issue which is slightly different. > Can you elaborate more, why ->irq_mask() / ->irq_unmask() are not being called? Sure, The basic software invoking process is as follows: Release IRQ: free_irq() -> __free_irq() -> irq_shutdown() ->__irq_disable() Disable IRQ: disable_irq() -> __disable_irq_nosync() -> __disable_irq -> irq_disable -> __irq_disable() As shown before, both will call __irq_disable(). The code of it is as follows: if (irqd_irq_disabled(&desc->irq_data)) {     if (mask)         mask_irq(desc); } else {         irq_state_set_disabled(desc);             if (desc->irq_data.chip->irq_disable) { desc->irq_data.chip->irq_disable(&desc->irq_data);                 irq_state_set_masked(desc);             } else if (mask) {                 mask_irq(desc);     } } Because gpio-dwapb.c provides the hook function of irq_disable, __irq_disable() will directly calls chip->irq_disable() instead of mask_irq(). For irq_enable(), it's similar and the code is as follows: if (!irqd_irq_disabled(&desc->irq_data)) {     unmask_irq(desc); } else {     irq_state_clr_disabled(desc);     if (desc->irq_data.chip->irq_enable) { desc->irq_data.chip->irq_enable(&desc->irq_data);         irq_state_clr_masked(desc);     } else {         unmask_irq(desc);     } } Similarly, because gpio-dwapb.c provides the hook function of irq_enable, irq_enable() will directly calls chip->irq_enable() but does not call unmask_irq(). Therefore, the current handle is as follows: API of IRQ:        |   mask_irq()             | disable_irq()            |    enable_irq() gpio-dwapb.c:  |   chip->irq_mask()   | chip->irq_diable()   |    chip->irq_enable() I do not know why irq_enable() only calls chip->irq_enable(). However, the code shows that irq_enable() clears the disable and masked flags in the irq_data state. Therefore, for gpio-dwapb.c, I thinks ->irq_enable also needs to clear the disable and masked flags in the hardware register.