Received: by 2002:a05:6a10:f347:0:0:0:0 with SMTP id d7csp985326pxu; Wed, 2 Dec 2020 08:13:50 -0800 (PST) X-Google-Smtp-Source: ABdhPJx34MJOto3I9++gsDEoG31PddyeXf0IYmG7oL62GkgIB/5La3qOYsCyE812pXCf44CzoCKU X-Received: by 2002:a50:f1c7:: with SMTP id y7mr643090edl.184.1606925629801; Wed, 02 Dec 2020 08:13:49 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1606925629; cv=none; d=google.com; s=arc-20160816; b=Ya0Lf07ZG1VE6tj7WNTGcqE2EztSdOpTvJESN9SMR0oIy076l1rUK7R82spX+lnrF0 YVtluPY4wDtV2osjFspjdkJgXfw+9Zjvt20XEiWDyw4wwFz+jGW/GSf7Yb3TRjuwAG4x 676Kl/naxGq86jH3qj97EVdD5fu1xtOMxY64aMD24dnlzBowdJug6nMzxS90hedCtcZX bUy9iFbCgi2NR5DTbjajQGi2hLmOZxOgJHZNUnhjC9AVr3YydmutmESo3+5+CXKRHcTM a79RlgfZ8ezyRTyLrnMLFqPx7EL51N67vLvOaV9zg9mvwPVgyE5j9WZIr1zJQZRtIGuu 6ACQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from; bh=STnalhbZJdU4aQQpDYU/rK2QKdseDLjl1omSihe7318=; b=YcnXyFLWq66U9bxZO6tYJ1+myRVwad81JoU0nkpWmsCRY7+r9u9woE7z1oik7AOxpg 815s7XlrCE91tbNlhUD1ub6svx+RhKCye9VxyxOlqiAeL04YEqRn8JJNBfhuW6nVmKAz eLTPRv3zoA85Tx9Ih0c1vQJa6Q0uQlESInf91wRr6Y8k6oWa4ZTGqTeSh6RW4Y9Apkov vRuyI9/KQ7jOtqayxWlCSN2f8ZAiwENmj5wMa4YI1u+5sbqbkI7zLEuM0Vts1i7401wD ux8DL7ri+ffkglHClTEwPnTenOhTt4V56pKHw/U0Yp2tDAYnMKi0ROwNzyaZh4q4tsFg 3CHA== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=siol.net Return-Path: Received: from vger.kernel.org (vger.kernel.org. [23.128.96.18]) by mx.google.com with ESMTP id k20si196679ejj.381.2020.12.02.08.13.26; Wed, 02 Dec 2020 08:13:49 -0800 (PST) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) client-ip=23.128.96.18; Authentication-Results: mx.google.com; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=siol.net Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1729286AbgLBQLi (ORCPT + 99 others); Wed, 2 Dec 2020 11:11:38 -0500 Received: from mailoutvs5.siol.net ([185.57.226.196]:43698 "EHLO mail.siol.net" rhost-flags-OK-OK-OK-FAIL) by vger.kernel.org with ESMTP id S1726507AbgLBQLi (ORCPT ); Wed, 2 Dec 2020 11:11:38 -0500 Received: from localhost (localhost [127.0.0.1]) by mail.siol.net (Postfix) with ESMTP id A022E520516; Wed, 2 Dec 2020 17:10:54 +0100 (CET) X-Virus-Scanned: amavisd-new at psrvmta11.zcs-production.pri Received: from mail.siol.net ([127.0.0.1]) by localhost (psrvmta11.zcs-production.pri [127.0.0.1]) (amavisd-new, port 10032) with ESMTP id hmIEAFM6fW50; Wed, 2 Dec 2020 17:10:54 +0100 (CET) Received: from mail.siol.net (localhost [127.0.0.1]) by mail.siol.net (Postfix) with ESMTPS id 50050520F6E; Wed, 2 Dec 2020 17:10:54 +0100 (CET) Received: from kista.localnet (cpe1-5-97.cable.triera.net [213.161.5.97]) (Authenticated sender: jernej.skrabec@siol.net) by mail.siol.net (Postfix) with ESMTPA id 8F76E520516; Wed, 2 Dec 2020 17:10:51 +0100 (CET) From: Jernej =?utf-8?B?xaBrcmFiZWM=?= To: Maxime Ripard , Chen-Yu Tsai , Andre Przywara Cc: Icenowy Zheng , linux-arm-kernel@lists.infradead.org, linux-sunxi@googlegroups.com, Linus Walleij , Rob Herring , Yangtao Li , linux-kernel@vger.kernel.org, Michael Turquette , Stephen Boyd , linux-clk@vger.kernel.org, Andre Przywara Subject: Re: [PATCH 1/8] clk: sunxi-ng: h6: Fix clock divider range on some clocks Date: Wed, 02 Dec 2020 17:17:03 +0100 Message-ID: <2017247.PyFJg3gf1G@kista> In-Reply-To: <20201202135409.13683-2-andre.przywara@arm.com> References: <20201202135409.13683-1-andre.przywara@arm.com> <20201202135409.13683-2-andre.przywara@arm.com> MIME-Version: 1.0 Content-Transfer-Encoding: 7Bit Content-Type: text/plain; charset="us-ascii" Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Dne sreda, 02. december 2020 ob 14:54:02 CET je Andre Przywara napisal(a): > While comparing clocks between the H6 and H616, some of the M factor > ranges were found to be wrong: the manual says they are only covering > two bits [1:0], but our code had "5" in the number-of-bits field. > > By writing 0xff into that register in U-Boot and via FEL, it could be > confirmed that bits [4:2] are indeed masked off, so the manual is right. > > Change to number of bits in the affected clock's description. > > Fixes: 524353ea480b ("clk: sunxi-ng: add support for the Allwinner H6 CCU") > Signed-off-by: Andre Przywara Reviewed-by: Jernej Skrabec Best regards, Jernej