Received: by 2002:a05:6a10:f347:0:0:0:0 with SMTP id d7csp275629pxu; Wed, 2 Dec 2020 22:59:47 -0800 (PST) X-Google-Smtp-Source: ABdhPJz905uK/LDjVxYIR1DFxzkCw8qPPWfWtAySng/VLs1JcTMw3aTQ51LxretuFdTbmAw9yGF3 X-Received: by 2002:a17:906:7d91:: with SMTP id v17mr1295031ejo.522.1606978787655; Wed, 02 Dec 2020 22:59:47 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1606978787; cv=none; d=google.com; s=arc-20160816; b=DCBd3eecrhB2Z7zUurLSsE/YjekRCFALGFwVPrQeb5mQ4N8QoSORohw+9RNpUqkpzK fpgWYaHQoGb/LH4n63rUyw2/8A3vhMle1YJj5/sll8xiKKkN5vjU2fW4btAjlO4cnvDb 9vYH9pRfZnTKM67zDNwgleztUFg80O+4KGXX4fo5et3t0GL3Xa7iGX0O32yoFFrIgHIw Hv7JF37vFM6voTfkjycAp/4KTv5uuGMddNIelL0AKrjKcmVqcPRa5u+D49gCeGDm3gUG Mt9tyfQEokdYCmW8NjcRV/xcwJoX4oCRquUPDYdkh/C/ZXtRiUwA/QR0L260nH5/CLrM snCQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:mime-version:message-id:date:subject:cc:to:from; bh=NgCae4T6DfH9bqbvwmclGLJ04gU+PRvv24fW/fp3hFk=; b=Ep4jtVK+aAP5i+hH5ggXGGgCT8MezUnSD0kn1+nVpNXaE4OfHDzrAlmVF90Q0bixcb NB2gl97gnDB4nCtd1jjLqZZr1Va9E+LdIAmlGwZ+19aZZ4yyFsy7THbTXLsDaNrCab90 9GJOWqqEaHqTPmadR33uB9P/3R89vTAn+ekaaU95ZAILtZVWVlI8jOUeZc2Q/atJ5F3N +eKCeIhIgnGGf+3EyuW79MHeOD3elGDya5909wpbrXWApb6o99AEqUzG5RBv3VsNHyN/ t6Fe0RsSaDonR8njnxukPA8Ia/w4MpQh/BwIDMLh/8+XqwSc51N7QAJ+dJDRyOyAZprI h88Q== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [23.128.96.18]) by mx.google.com with ESMTP id s20si40254ejd.566.2020.12.02.22.59.24; Wed, 02 Dec 2020 22:59:47 -0800 (PST) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) client-ip=23.128.96.18; Authentication-Results: mx.google.com; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1729782AbgLCG5G (ORCPT + 99 others); Thu, 3 Dec 2020 01:57:06 -0500 Received: from szxga04-in.huawei.com ([45.249.212.190]:8185 "EHLO szxga04-in.huawei.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1725912AbgLCG5F (ORCPT ); Thu, 3 Dec 2020 01:57:05 -0500 Received: from DGGEMS402-HUB.china.huawei.com (unknown [172.30.72.60]) by szxga04-in.huawei.com (SkyGuard) with ESMTP id 4Cmmnm0b9qz15WDn; Thu, 3 Dec 2020 14:55:56 +0800 (CST) Received: from euler.huawei.com (10.175.124.27) by DGGEMS402-HUB.china.huawei.com (10.3.19.202) with Microsoft SMTP Server id 14.3.487.0; Thu, 3 Dec 2020 14:56:15 +0800 From: Wei Li To: Thomas Bogendoerfer , Paul Burton CC: , , , Subject: [PATCH] MIPS: SMP-CPS: Add support for irq migration when CPU offline Date: Thu, 3 Dec 2020 14:54:43 +0800 Message-ID: <20201203065443.11263-1-liwei391@huawei.com> X-Mailer: git-send-email 2.17.1 MIME-Version: 1.0 Content-Type: text/plain X-Originating-IP: [10.175.124.27] X-CFilter-Loop: Reflected Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Currently we won't migrate irqs when offline CPUs, which has been implemented on most architectures. That will lead to some devices work incorrectly if the bound cores are offline. While that can be easily supported by enabling GENERIC_IRQ_MIGRATION. But i don't pretty known the reason it was not supported on all MIPS platforms. This patch add the support for irq migration on MIPS CPS platform, and it's tested on the interAptiv processor. Signed-off-by: Wei Li --- arch/mips/Kconfig | 1 + arch/mips/kernel/smp-cps.c | 2 ++ 2 files changed, 3 insertions(+) diff --git a/arch/mips/Kconfig b/arch/mips/Kconfig index a48cb9a71471..8ece19ffe255 100644 --- a/arch/mips/Kconfig +++ b/arch/mips/Kconfig @@ -2510,6 +2510,7 @@ config MIPS_CPS select SYS_SUPPORTS_SCHED_SMT if CPU_MIPSR6 select SYS_SUPPORTS_SMP select WEAK_ORDERING + select GENERIC_IRQ_MIGRATION if HOTPLUG_CPU help Select this if you wish to run an SMP kernel across multiple cores within a MIPS Coherent Processing System. When this option is diff --git a/arch/mips/kernel/smp-cps.c b/arch/mips/kernel/smp-cps.c index 3ab433a8e871..26f74f7d7604 100644 --- a/arch/mips/kernel/smp-cps.c +++ b/arch/mips/kernel/smp-cps.c @@ -12,6 +12,7 @@ #include #include #include +#include #include #include @@ -465,6 +466,7 @@ static int cps_cpu_disable(void) smp_mb__after_atomic(); set_cpu_online(cpu, false); calculate_cpu_foreign_map(); + irq_migrate_all_off_this_cpu(); return 0; } -- 2.17.1