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[23.128.96.18]) by mx.google.com with ESMTP id hp39si658379ejc.214.2020.12.03.00.14.34; Thu, 03 Dec 2020 00:14:57 -0800 (PST) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) client-ip=23.128.96.18; Authentication-Results: mx.google.com; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=intel.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S2388247AbgLCILs (ORCPT + 99 others); Thu, 3 Dec 2020 03:11:48 -0500 Received: from mga09.intel.com ([134.134.136.24]:1542 "EHLO mga09.intel.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1728193AbgLCILs (ORCPT ); Thu, 3 Dec 2020 03:11:48 -0500 IronPort-SDR: AWr0W7MHB77Fuj3qIBMnjoKr4a+DyCEwe11syuh2mPNMvMj2qUvuXexKrHFRDwtoHg/Ejx1UgQ kgU7Ls/yT0tg== X-IronPort-AV: E=McAfee;i="6000,8403,9823"; a="173313650" X-IronPort-AV: E=Sophos;i="5.78,389,1599548400"; d="scan'208";a="173313650" X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from fmsmga005.fm.intel.com ([10.253.24.32]) by orsmga102.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 03 Dec 2020 00:11:07 -0800 IronPort-SDR: UNLFDTrOs/+Xk6MkL/F/0LzRGv9RvZc7nGayr+kzFLZaBeSNGVPjoGXRaPund9ZfeZShLIimv7 uOiDINNhbm+A== X-IronPort-AV: E=Sophos;i="5.78,389,1599548400"; d="scan'208";a="540018282" Received: from smile.fi.intel.com (HELO smile) ([10.237.68.40]) by fmsmga005-auth.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 03 Dec 2020 00:11:04 -0800 Received: from andy by smile with local (Exim 4.94) (envelope-from ) id 1kkjig-00BhXF-9Y; Thu, 03 Dec 2020 10:12:06 +0200 Date: Thu, 3 Dec 2020 10:12:06 +0200 From: "Shevchenko, Andriy" To: "Zulkifli, Muhammad Husaini" Cc: Linus Walleij , Ulf Hansson , "Hunter, Adrian" , Michal Simek , linux-mmc , Linux ARM , "linux-kernel@vger.kernel.org" , "Raja Subramanian, Lakshmi Bai" , "Wan Mohamad, Wan Ahmad Zainie" , Mark Gross Subject: Re: [PATCH v6 4/4] mmc: sdhci-of-arasan: Enable UHS-1 support for Keem Bay SOC Message-ID: <20201203081206.GR4077@smile.fi.intel.com> References: <20201202150205.20150-1-muhammad.husaini.zulkifli@intel.com> <20201202150205.20150-5-muhammad.husaini.zulkifli@intel.com> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: Organization: Intel Finland Oy - BIC 0357606-4 - Westendinkatu 7, 02160 Espoo Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Thu, Dec 03, 2020 at 09:10:14AM +0200, Zulkifli, Muhammad Husaini wrote: > >From: Linus Walleij > >Sent: Thursday, December 3, 2020 2:55 AM > >On Wed, Dec 2, 2020 at 8:04 AM > >wrote: ... > >If it should use any abstraction it should be a selector regulator IMO and > >while that may seem overengineered it adds something because regulators > >are used in the MMC subsystem for vdd and vqmmc because we are handling > >the OCR mask with that and it can support any amount of present and future > >voltages for signal levels with that as well. Any future changes to how the > >different signal voltages are set or which voltages exist can then be done in > >that regulator driver. > > This is limitation of Keem Bay HW and I would say Keem Bay HW is somewhat > unique in the way of handling the IO bus line voltage. > SDcard does not have its own voltage regulator. > I created one function sdhci_arasan_keembay_io_line_supply_operation() in sdhci-of-arasan.c > to handle the vqmmc(io line supply operation) specific for Keem Bay SoC. > > For Keem Bay, to actually modelling this as regulator ,for vqmmc, , we need to handle 2 things: > 1) Output expander pins : using gpio regulator > 2) voltage rail : call keembay_io_rail_supplied_voltage() to handle the SMCC Arm. > > Other hardware might not need this as they might easily configure the vqmmc > hooked up to regulator. > > IMHO, we do not need to overengineered it to add custom selector > regulator just to suit this Keem Bay HW design. I guess Linus has a point. If it can be abstracted as selector regulator it will suits generic approach in the MMC code. And what is the problem to have two or more regulators? Or regulator hierarchy? -- With Best Regards, Andy Shevchenko