Received: by 2002:a05:6a10:f347:0:0:0:0 with SMTP id d7csp491740pxu;
        Thu, 3 Dec 2020 05:40:49 -0800 (PST)
X-Google-Smtp-Source: ABdhPJy7s8WI5YuRvfy5UR42vLSvCQkcWhXved7G81PAsv5K7OFWf02fhtkKopHGr3pOxme2MEmG
X-Received: by 2002:a17:906:d101:: with SMTP id b1mr2614537ejz.80.1607002849470;
        Thu, 03 Dec 2020 05:40:49 -0800 (PST)
ARC-Seal: i=1; a=rsa-sha256; t=1607002849; cv=none;
        d=google.com; s=arc-20160816;
        b=n/x5BQuwkrpc2enFi4KCGEP0vt1QpJ6+D7Dfx8nWr2KSSLz7h6+/40MGzwkxv4zKgm
         lu2SatJ8VV8f3EjhsXb2XJ9UPERT30GQVqafTxxG2B/r72fG7HcbwJVxbc7tD4Shm2TL
         7tt0v3VwmmFTgM3CMXka40RdLzagpI4iykIdorZ4ZF9Gl3I8DfzYoMH6vX2qtvesx6pX
         UmbiLiyDxeDGWEbSGEQulWuiLfxhEc3WoJhwHEG+2KqDJAobjYD45JGOSVEQf1QjLwuz
         lzAG2dIfJHQqdxAoTNDTFECL2JA7dzvdlOtd/GmNTofqzyZQ34eHmwc+Z6rW/g8yri5n
         muSA==
ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816;
        h=list-id:precedence:dkim-signature:mime-version:references
         :in-reply-to:message-id:date:subject:cc:to:from;
        bh=9xJCFbRLjmFSLiJtC9Hodz4spFE7fDQoE22+vvQYdWM=;
        b=tLGH2AQatToM1oNt7YnRCGGsIGVbyf0ETCeIp4FpiFj65csOPufqS2R1KGQnsj8+oF
         ewQcUM2qEBE1tWkAmSPIBpK549xSEA8P+F+OXK8dzgZsC3MoWUxZMxmjH3t7ehK4BZKy
         HAHwlipkpEdeBrD8J2p8RW5ZDcAo19Zqia1aeFh3fA/m5SaIF3UNbauQNDVjLo89ZOIv
         gP54Xk8etyZRA0bdmI0ilQjaaL8qg1Dal7HKEOstUQbFcFsNIDf1Ni6/w2xBHx9+uCQ1
         V15jQWezGtTAG94YjppZdKz6reY798cFP4v5G8lqxD2uvVnjV5SO3ArribTpZ5TfpqhI
         jzjg==
ARC-Authentication-Results: i=1; mx.google.com;
       dkim=pass header.i=@nvidia.com header.s=n1 header.b="PvPeQ3/Y";
       spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org;
       dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=nvidia.com
Return-Path: <linux-kernel-owner@vger.kernel.org>
Received: from vger.kernel.org (vger.kernel.org. [23.128.96.18])
        by mx.google.com with ESMTP id x40si916486ede.441.2020.12.03.05.40.15;
        Thu, 03 Dec 2020 05:40:49 -0800 (PST)
Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) client-ip=23.128.96.18;
Authentication-Results: mx.google.com;
       dkim=pass header.i=@nvidia.com header.s=n1 header.b="PvPeQ3/Y";
       spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org;
       dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=nvidia.com
Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand
        id S2437182AbgLCNf7 (ORCPT <rfc822;proy.cse@gmail.com> + 99 others);
        Thu, 3 Dec 2020 08:35:59 -0500
Received: from hqnvemgate24.nvidia.com ([216.228.121.143]:15235 "EHLO
        hqnvemgate24.nvidia.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org
        with ESMTP id S2437051AbgLCNf4 (ORCPT
        <rfc822;linux-kernel@vger.kernel.org>);
        Thu, 3 Dec 2020 08:35:56 -0500
Received: from hqmail.nvidia.com (Not Verified[216.228.121.13]) by hqnvemgate24.nvidia.com (using TLS: TLSv1.2, AES256-SHA)
        id <B5fc8e9940002>; Thu, 03 Dec 2020 05:35:16 -0800
Received: from HQMAIL101.nvidia.com (172.20.187.10) by HQMAIL107.nvidia.com
 (172.20.187.13) with Microsoft SMTP Server (TLS) id 15.0.1473.3; Thu, 3 Dec
 2020 13:35:14 +0000
Received: from vidyas-desktop.nvidia.com (10.124.1.5) by mail.nvidia.com
 (172.20.187.10) with Microsoft SMTP Server id 15.0.1473.3 via Frontend
 Transport; Thu, 3 Dec 2020 13:35:10 +0000
From:   Vidya Sagar <vidyas@nvidia.com>
To:     <lorenzo.pieralisi@arm.com>, <robh+dt@kernel.org>,
        <bhelgaas@google.com>, <thierry.reding@gmail.com>,
        <jonathanh@nvidia.com>, <amanharitsh123@gmail.com>,
        <dinghao.liu@zju.edu.cn>, <kw@linux.com>
CC:     <linux-pci@vger.kernel.org>, <linux-tegra@vger.kernel.org>,
        <linux-kernel@vger.kernel.org>, <kthota@nvidia.com>,
        <mmaddireddy@nvidia.com>, <vidyas@nvidia.com>, <sagar.tv@gmail.com>
Subject: [PATCH V5 2/5] PCI: tegra: Set DesignWare IP version
Date:   Thu, 3 Dec 2020 19:04:48 +0530
Message-ID: <20201203133451.17716-3-vidyas@nvidia.com>
X-Mailer: git-send-email 2.17.1
In-Reply-To: <20201203133451.17716-1-vidyas@nvidia.com>
References: <20201203133451.17716-1-vidyas@nvidia.com>
X-NVConfidentiality: public
MIME-Version: 1.0
Content-Type: text/plain
DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=nvidia.com; s=n1;
        t=1607002516; bh=9xJCFbRLjmFSLiJtC9Hodz4spFE7fDQoE22+vvQYdWM=;
        h=From:To:CC:Subject:Date:Message-ID:X-Mailer:In-Reply-To:
         References:X-NVConfidentiality:MIME-Version:Content-Type;
        b=PvPeQ3/YJ15PpOUhN9Zk9MjTF6j51mUIyC+glTZA2Mrg+hMVq12c/Kv0wrL9CTVWm
         Js77ajnIsVNdCQFMkD8DFeEXjkKideZnKHIZZ1YerY8iobDLUSVCv2QwNPj3iei6P7
         1SKN+24ufUDZcx8GBuZcN4bhA5C3EByf+YhYdeC57pd3MwXlqrwzkiXSJEpG+b1DrV
         1Ty4eB5l8mV/4RlkOz4PJ8/d8qqRCpVi9GIp9YCTGspDXNYxZSDTdC8VlezH7DEwCF
         iBmkON5rjRcXaeqC95c5eFA1lsGltzx4nPjQlrMRzooCeOdALyVUirD8KLVg5IXLeH
         vna4nISSrjqHg==
Precedence: bulk
List-ID: <linux-kernel.vger.kernel.org>
X-Mailing-List: linux-kernel@vger.kernel.org

Set the DesignWare IP version for Tegra194 to 0x490A. This would be used
by the DesigWare sub-system to do any version specific configuration
(Ex:- TD bit programming for ECRC).

Tested-by: Thierry Reding <treding@nvidia.com>
Signed-off-by: Vidya Sagar <vidyas@nvidia.com>
Acked-by: Thierry Reding <treding@nvidia.com>
---
V5:
* Added Tested-by and Acked-by from Thierry Reding

V4:
* None

V3:
* None

V2:
* None

 drivers/pci/controller/dwc/pcie-tegra194.c | 1 +
 1 file changed, 1 insertion(+)

diff --git a/drivers/pci/controller/dwc/pcie-tegra194.c b/drivers/pci/controller/dwc/pcie-tegra194.c
index 4c966e9adb2b..59163b735c96 100644
--- a/drivers/pci/controller/dwc/pcie-tegra194.c
+++ b/drivers/pci/controller/dwc/pcie-tegra194.c
@@ -1984,6 +1984,7 @@ static int tegra_pcie_dw_probe(struct platform_device *pdev)
 	pci->ops = &tegra_dw_pcie_ops;
 	pci->n_fts[0] = N_FTS_VAL;
 	pci->n_fts[1] = FTS_VAL;
+	pci->version = 0x490A;
 
 	pp = &pci->pp;
 	pp->num_vectors = MAX_MSI_IRQS;
-- 
2.17.1