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Date:   Thu, 3 Dec 2020 19:50:24 +0200
From:   Vladimir Oltean <olteanv@gmail.com>
To:     =?utf-8?B?0JzQsNC60YHQuNC8INCa0LjRgdC10LvRkdCy?= 
        <bigunclemax@gmail.com>
Cc:     Mark Brown <broonie@kernel.org>, linux-spi@vger.kernel.org,
        linux-kernel@vger.kernel.org, Maxim Kochetkov <fido_max@inbox.ru>
Subject: Re: [PATCH] spi: spi-fsl-dspi: Add GPIO chip select support
Message-ID: <20201203175024.hzivclydoxp6txir@skbuf>
References: <CALHCpMgQPDqV1tB6v0sA0imwfZGkoG_j84NZCehOT1pf8MTuCA@mail.gmail.com>
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Hi Maxim,

On Thu, Dec 03, 2020 at 08:12:19PM +0300, Максим Киселёв wrote:
> From: Maxim Kiselev <bigunclemax@gmail.com>
> Date: Thu, 3 Dec 2020 18:56:12 +0300
> Subject: [PATCH] spi: spi-fsl-dspi: Add GPIO chip select support
> 
> This patch allows use of GPIO for the chip select.
> Because dSPI controller can't send transactions without hardware chip
> selects, so first unused native CS will be set in SPI_PUSHR_CMD_PCS

Are you sure?

From the reference manual:

SPIx_PUSHR bits 10–15 PCS:
Select which PCS signals are to be asserted for the transfer. Refer to
the chip-specific SPI information for the number of PCS signals used in
this chip.
0 Negate the PCS[x] signal.
1 Assert the PCS[x] signal.

And the definition is:

#define SPI_PUSHR_CMD_PCS(x)		(BIT(x) & GENMASK(5, 0))

Notice the BIT(x).

I expect that you can set the PCS to 0 and no hard chip select will
assert.