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From:   Maksim Kiselev <bigunclemax@gmail.com>
Date:   Thu, 3 Dec 2020 21:50:04 +0300
Message-ID: <CALHCpMgmdfScVhWKhhtisZ=-rf0wS8CujDoVWBJ8qkL_OXGu1g@mail.gmail.com>
Subject: Re: [PATCH] spi: spi-fsl-dspi: Add GPIO chip select support
To:     Vladimir Oltean <olteanv@gmail.com>
Cc:     Mark Brown <broonie@kernel.org>, linux-spi@vger.kernel.org,
        linux-kernel@vger.kernel.org, Maxim Kochetkov <fido_max@inbox.ru>
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Hi Vladimir, thanks for the answer!

I must have missed these. In any case, I would like to add
functionality for using GPIO as CS. Because I have a board which
actually uses this. I'II check your solution and modify my patch.

=D1=87=D1=82, 3 =D0=B4=D0=B5=D0=BA. 2020 =D0=B3. =D0=B2 20:50, Vladimir Olt=
ean <olteanv@gmail.com>:
>
> Hi Maxim,
>
> On Thu, Dec 03, 2020 at 08:12:19PM +0300, =D0=9C=D0=B0=D0=BA=D1=81=D0=B8=
=D0=BC =D0=9A=D0=B8=D1=81=D0=B5=D0=BB=D1=91=D0=B2 wrote:
> > From: Maxim Kiselev <bigunclemax@gmail.com>
> > Date: Thu, 3 Dec 2020 18:56:12 +0300
> > Subject: [PATCH] spi: spi-fsl-dspi: Add GPIO chip select support
> >
> > This patch allows use of GPIO for the chip select.
> > Because dSPI controller can't send transactions without hardware chip
> > selects, so first unused native CS will be set in SPI_PUSHR_CMD_PCS
>
> Are you sure?
>
> From the reference manual:
>
> SPIx_PUSHR bits 10=E2=80=9315 PCS:
> Select which PCS signals are to be asserted for the transfer. Refer to
> the chip-specific SPI information for the number of PCS signals used in
> this chip.
> 0 Negate the PCS[x] signal.
> 1 Assert the PCS[x] signal.
>
> And the definition is:
>
> #define SPI_PUSHR_CMD_PCS(x)            (BIT(x) & GENMASK(5, 0))
>
> Notice the BIT(x).
>
> I expect that you can set the PCS to 0 and no hard chip select will
> assert.