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charset="us-ascii" Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 X-MS-Exchange-CrossTenant-AuthAs: Internal X-MS-Exchange-CrossTenant-AuthSource: SN6PR11MB3421.namprd11.prod.outlook.com X-MS-Exchange-CrossTenant-Network-Message-Id: e7a6f7be-ec02-4a84-bb1f-08d897a5dd09 X-MS-Exchange-CrossTenant-originalarrivaltime: 03 Dec 2020 16:09:50.5336 (UTC) X-MS-Exchange-CrossTenant-fromentityheader: Hosted X-MS-Exchange-CrossTenant-id: 46c98d88-e344-4ed4-8496-4ed7712e255d X-MS-Exchange-CrossTenant-mailboxtype: HOSTED X-MS-Exchange-CrossTenant-userprincipalname: rscKhzyS/ZDaX9ZfzD7oyNjjXQusua5DDJQSkyvSsq+6qMR9fXJvxfGY88rZajFvOhONgks0UHm+1sk2n+TXuE5qAST+9Jx0yeAtjQlXjFToCOSo0kszTCI3pDBI2o4Wq1vvFN4+hcVW0UfPR3W6UQ== X-MS-Exchange-Transport-CrossTenantHeadersStamped: SN6PR11MB2573 X-OriginatorOrg: intel.com Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Okay then I will wait for someone to respond with "Reviewed-by". So this ca= n be merged. Thanks, Tejas > -----Original Message----- > From: Bjorn Helgaas > Sent: 03 December 2020 20:55 > To: Joonas Lahtinen > Cc: Surendrakumar Upadhyay, TejaskumarX > ; Jesse Barnes > ; Daniel Vetter ; Linux PCI pci@vger.kernel.org>; Linux Kernel Mailing List kernel@vger.kernel.org>; X86 ML ; Borislav Petkov > ; De Marchi, Lucas ; Roper, > Matthew D ; Pandey, Hariom > ; Jani Nikula ; Viv= i, > Rodrigo ; David Airlie > Subject: Re: [PATCH] x86/gpu: add JSL stolen memory support >=20 > On Thu, Dec 03, 2020 at 10:46:29AM +0200, Joonas Lahtinen wrote: > > Quoting Bjorn Helgaas (2020-12-02 22:22:53) > > > On Wed, Dec 02, 2020 at 05:21:58AM +0000, Surendrakumar Upadhyay, > TejaskumarX wrote: > > > > Yes it fails all the tests which are allocating from this stolen > > > > memory bunch. For example IGT tests like " > > > > igt@kms_frontbuffer_tracking@-[fbc|fbcpsr].* | > > > > igt@kms_fbcon_fbt@fbc.* " are failing as they totally depend to > > > > work on stolen memory. > > > > That's just because we have de-duped the stolen memory detection code. > > If it's not detected at the early quirks, it's not detected by the > > driver at all. > > > > So if the patch is not merged to early quirks, we'd have to refactor > > the code to add alternative detection path to i915. Before that is > > done, the failures are expected. > > > > > I'm sure that means something to graphics developers, but I have no > > > idea! Do you have URLs for the test case source, outputs, dmesg > > > log, lspci info, bug reports, etc? > > > > The thing is, the bug reports for stuff like this would only start to > > flow after Jasperlake systems are shipping widely and the less common > > OEMs start integrating it to into strangely behaving BIOSes. Or that > > is the assumption. > > > > If it's fine to merge this through i915 for now with an Acked-by, like > > the previous patches, that'd be great. We can start a discussion on if > > the new platforms are affected anymore. But I'd rather not drop it > > before we have that understanding, as the previous problems have > > included boot time memory corruption. > > > > Would that work? >=20 > Like I said, I'm not objecting if somebody else wants to apply this. >=20 > I'm just pointing out that there's a little bit of voodoo here because it= 's not > clear what makes a BIOS strangely behaving or what causes boot-time > memory corruption, and that means we don't really have any hope of > resolving this stream of quirk updates. >=20 > Bjorn