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From:   Alexandre Belloni <alexandre.belloni@bootlin.com>
To:     "nicolas.ferre@microchip.com" <nicolas.ferre@microchip.com>,
        Ludovic Desroches <ludovic.desroches@microchip.com>
Cc:     Alexandre Belloni <alexandre.belloni@bootlin.com>,
        linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org,
        Dan Sneddon <dan.sneddon@microchip.com>,
        stable@vger.kernel.org,
        Cristian Birsan <cristian.birsan@microchip.com>,
        devicetree@vger.kernel.org
Subject: Re: [PATCH] ARM: dts: at91: sama5d2: fix CAN message ram offset and size
Date:   Thu,  3 Dec 2020 20:47:53 +0100
Message-Id: <160702486441.80366.4433626293403799322.b4-ty@bootlin.com>
In-Reply-To: <20201203091949.9015-1-nicolas.ferre@microchip.com>
References: <20201203091949.9015-1-nicolas.ferre@microchip.com>
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On Thu, 3 Dec 2020 10:19:49 +0100, nicolas.ferre@microchip.com wrote:
> CAN0 and CAN1 instances share the same message ram configured
> at 0x210000 on sama5d2 Linux systems.
> According to current configuration of CAN0, we need 0x1c00 bytes
> so that the CAN1 don't overlap its message ram:
> 64 x RX FIFO0 elements => 64 x 72 bytes
> 32 x TXE (TX Event FIFO) elements => 32 x 8 bytes
> 32 x TXB (TX Buffer) elements => 32 x 72 bytes
> So a total of 7168 bytes (0x1C00).
> 
> [...]

Applied, thanks!

[1/1] ARM: dts: at91: sama5d2: fix CAN message ram offset and size
      commit: bee3d7266dc3658d40c3d36074873b1299591f11

Best regards,
-- 
Alexandre Belloni <alexandre.belloni@bootlin.com>