Received: by 2002:a05:6a10:f347:0:0:0:0 with SMTP id d7csp168603pxu; Thu, 3 Dec 2020 23:38:58 -0800 (PST) X-Google-Smtp-Source: ABdhPJxUqK3Dpv4yYlWB7lZNCix3N97QqWOHTSCtNdpqDYC21TBvS9LazCfa+StXApo0WMcELCrJ X-Received: by 2002:a17:906:a181:: with SMTP id s1mr6004890ejy.335.1607067538065; Thu, 03 Dec 2020 23:38:58 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1607067538; cv=none; d=google.com; s=arc-20160816; b=051mV1hdvEVLhiGJElu9H1OM4oM/fWdRRQQVagbPoO8DUTXb68sOvaHdNEH8Qv42BS Tf/iyRzjwbcfNW3EVNQzG5qVAV5FPWsKtJJfyHivcTFWlQIl51L/HRstStqZWT6v/ei0 cjw5WTluRMjqIqnViIeKoK+vYyWx354i2HFYGdLpMyk4qQiAxfdE2F8RKUYOOEUvbPCh PljKCDsDL8cqwVDTCDEW0LNpkgbmyZwfm+rSKlQ9bxP/axxuqXxFFDi+pzQpYxd5Yvx2 BVFP++Z/U2Q59Sc7jw4iXD4w76ss8HJwy5d5Pyndl8n4/5/RotQcefm0HexF+fiuhcaJ aicg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:in-reply-to :mime-version:user-agent:date:message-id:from:cc:references:to :subject; bh=nV3QtCAMnCAqHi9oGk8AHksk7TtJlOxsJiGeGup1iTQ=; b=a2D0MyAL+KqJOKY78GPRBa8bmjvtt3Jrs9XJJoVfxfwJxagq16bA9kl1kzAJY0JgAq 9tJCxD5hw8xQ85rBnKSCReQfORmses1ufxV2EtAAYrTYgxKXn1zpvuL30CEfrfbnXaDI jadX+8s+QD8DrtdFM8uVK7CoJOcuyoo/3tBtLvlfSYLOJz08P8CpEvxRa68e/smOk9L7 1F50LaILUSjQStm2hox8b005n/noKKcgNPJyBNmuRT17zER7Ez0ntep4noAzgwPSvzm2 6UMRFZ5XIrBk9hN3tyVLusRWSQCOjvCFP/FudeDaeCrfYwvjB1swTvF+wzKF0FoqV7Tt yXjg== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [23.128.96.18]) by mx.google.com with ESMTP id f9si2366873edw.224.2020.12.03.23.38.35; Thu, 03 Dec 2020 23:38:58 -0800 (PST) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) client-ip=23.128.96.18; Authentication-Results: mx.google.com; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1728297AbgLDHgj (ORCPT + 99 others); Fri, 4 Dec 2020 02:36:39 -0500 Received: from szxga05-in.huawei.com ([45.249.212.191]:9010 "EHLO szxga05-in.huawei.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1727518AbgLDHgj (ORCPT ); Fri, 4 Dec 2020 02:36:39 -0500 Received: from DGGEMS404-HUB.china.huawei.com (unknown [172.30.72.60]) by szxga05-in.huawei.com (SkyGuard) with ESMTP id 4CnPcx6ktLzhmMj; Fri, 4 Dec 2020 15:35:29 +0800 (CST) Received: from [10.174.187.37] (10.174.187.37) by DGGEMS404-HUB.china.huawei.com (10.3.19.204) with Microsoft SMTP Server id 14.3.487.0; Fri, 4 Dec 2020 15:35:50 +0800 Subject: Re: [PATCH v2 1/2] clocksource: arm_arch_timer: Use stable count reader in erratum sne To: Marc Zyngier References: <20200818032814.15968-1-zhukeqian1@huawei.com> <20200818032814.15968-2-zhukeqian1@huawei.com> CC: , , , , Steven Price , Andrew Jones , Catalin Marinas , Will Deacon , James Morse , Suzuki K Poulose , From: zhukeqian Message-ID: Date: Fri, 4 Dec 2020 15:35:39 +0800 User-Agent: Mozilla/5.0 (Windows NT 10.0; WOW64; rv:45.0) Gecko/20100101 Thunderbird/45.7.1 MIME-Version: 1.0 In-Reply-To: Content-Type: text/plain; charset="windows-1252" Content-Transfer-Encoding: 7bit X-Originating-IP: [10.174.187.37] X-CFilter-Loop: Reflected Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Hi Marc, On 2020/12/3 22:58, Marc Zyngier wrote: > On 2020-08-18 04:28, Keqian Zhu wrote: >> In commit 0ea415390cd3 ("clocksource/arm_arch_timer: Use arch_timer_read_counter >> to access stable counters"), we separate stable and normal count reader to omit >> unnecessary overhead on systems that have no timer erratum. >> >> However, in erratum_set_next_event_tval_generic(), count reader becomes normal >> reader. This converts it to stable reader. >> >> Fixes: 0ea415390cd3 ("clocksource/arm_arch_timer: Use >> arch_timer_read_counter to access stable counters") > > On a single line. Addressed. Thanks. > >> Signed-off-by: Keqian Zhu >> --- >> drivers/clocksource/arm_arch_timer.c | 4 ++-- >> 1 file changed, 2 insertions(+), 2 deletions(-) >> >> diff --git a/drivers/clocksource/arm_arch_timer.c >> b/drivers/clocksource/arm_arch_timer.c >> index 6c3e841..777d38c 100644 >> --- a/drivers/clocksource/arm_arch_timer.c >> +++ b/drivers/clocksource/arm_arch_timer.c >> @@ -396,10 +396,10 @@ static void >> erratum_set_next_event_tval_generic(const int access, unsigned long >> ctrl &= ~ARCH_TIMER_CTRL_IT_MASK; >> >> if (access == ARCH_TIMER_PHYS_ACCESS) { >> - cval = evt + arch_counter_get_cntpct(); >> + cval = evt + arch_counter_get_cntpct_stable(); >> write_sysreg(cval, cntp_cval_el0); >> } else { >> - cval = evt + arch_counter_get_cntvct(); >> + cval = evt + arch_counter_get_cntvct_stable(); >> write_sysreg(cval, cntv_cval_el0); >> } > > With that fixed: > > Acked-by: Marc Zyngier > > This should go via the clocksource tree. Added Cc to it's maintainers, thanks. > > Thanks, > > M. Cheers, Keqian