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([2a01:e34:ed2f:f020:8165:c1cc:d736:b53f]) by smtp.googlemail.com with ESMTPSA id a65sm6470758wmc.35.2020.12.05.03.15.02 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Sat, 05 Dec 2020 03:15:03 -0800 (PST) Subject: Re: [PATCH v3 2/2] clocksource: arm_arch_timer: Correct fault programming of CNTKCTL_EL1.EVNTI To: Keqian Zhu , linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, kvmarm@lists.cs.columbia.edu, kvm@vger.kernel.org Cc: Marc Zyngier , Thomas Gleixner , Catalin Marinas , Will Deacon , James Morse , Suzuki K Poulose , Sean Christopherson , Julien Thierry , Mark Brown , Andrew Morton , Alexios Zavras , wanghaibin.wang@huawei.com References: <20201204073126.6920-1-zhukeqian1@huawei.com> <20201204073126.6920-3-zhukeqian1@huawei.com> From: Daniel Lezcano Message-ID: Date: Sat, 5 Dec 2020 12:15:01 +0100 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:68.0) Gecko/20100101 Thunderbird/68.10.0 MIME-Version: 1.0 In-Reply-To: <20201204073126.6920-3-zhukeqian1@huawei.com> Content-Type: text/plain; charset=utf-8 Content-Language: en-US Content-Transfer-Encoding: 8bit Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Hi Marc, are you fine with this patch ? On 04/12/2020 08:31, Keqian Zhu wrote: > ARM virtual counter supports event stream, it can only trigger an event > when the trigger bit (the value of CNTKCTL_EL1.EVNTI) of CNTVCT_EL0 changes, > so the actual period of event stream is 2^(cntkctl_evnti + 1). For example, > when the trigger bit is 0, then virtual counter trigger an event for every > two cycles. > > Fixes: 037f637767a8 ("drivers: clocksource: add support for ARM architected timer event stream") > Suggested-by: Marc Zyngier > Signed-off-by: Keqian Zhu > --- > drivers/clocksource/arm_arch_timer.c | 23 ++++++++++++++++------- > 1 file changed, 16 insertions(+), 7 deletions(-) > > diff --git a/drivers/clocksource/arm_arch_timer.c b/drivers/clocksource/arm_arch_timer.c > index 777d38cb39b0..d0177824c518 100644 > --- a/drivers/clocksource/arm_arch_timer.c > +++ b/drivers/clocksource/arm_arch_timer.c > @@ -822,15 +822,24 @@ static void arch_timer_evtstrm_enable(int divider) > > static void arch_timer_configure_evtstream(void) > { > - int evt_stream_div, pos; > + int evt_stream_div, lsb; > + > + /* > + * As the event stream can at most be generated at half the frequency > + * of the counter, use half the frequency when computing the divider. > + */ > + evt_stream_div = arch_timer_rate / ARCH_TIMER_EVT_STREAM_FREQ / 2; > + > + /* > + * Find the closest power of two to the divisor. If the adjacent bit > + * of lsb (last set bit, starts from 0) is set, then we use (lsb + 1). > + */ > + lsb = fls(evt_stream_div) - 1; > + if (lsb > 0 && (evt_stream_div & BIT(lsb - 1))) > + lsb++; > > - /* Find the closest power of two to the divisor */ > - evt_stream_div = arch_timer_rate / ARCH_TIMER_EVT_STREAM_FREQ; > - pos = fls(evt_stream_div); > - if (pos > 1 && !(evt_stream_div & (1 << (pos - 2)))) > - pos--; > /* enable event stream */ > - arch_timer_evtstrm_enable(min(pos, 15)); > + arch_timer_evtstrm_enable(max(0, min(lsb, 15))); > } > > static void arch_counter_set_user_access(void) > -- Linaro.org │ Open source software for ARM SoCs Follow Linaro: Facebook | Twitter | Blog