Received: by 2002:a05:6a10:f347:0:0:0:0 with SMTP id d7csp1205462pxu; Sat, 5 Dec 2020 07:27:29 -0800 (PST) X-Google-Smtp-Source: ABdhPJzsjTRnZl6LV+jzNRk9OMhxfR3mtK3puV7DU9Bpe53KvIl7hMdvqndeQ7jQAcWjDDGEB8hU X-Received: by 2002:a17:906:8151:: with SMTP id z17mr12079003ejw.48.1607182049089; Sat, 05 Dec 2020 07:27:29 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1607182049; cv=none; d=google.com; s=arc-20160816; b=f3aqmeL9UUJIGmniTT11UG5EYUVxPKlXMmxtwAnimvUMu8d6eccp9Y5c7YUUCbSoNu FXnAgPp+DDeDwy23ZBDGhE9vaFL0XLMjz23sSQPBw2gvaeiAvFwVdMfPlWtzOzlWmZj7 c8MVUKWA3/qwlDnvShBzcHDWo7m4CEUtO7Fsk5chloJCTS8LjQbz4+p/aeseVpgh+jPZ u4vaD5kHnOXep9yX4TGEgZ+xJdRvSRkWMMAyMwwRG2NYo2Nl0XvuhJvYSVNCWURktVes RUmYs14EtL4ktVGiF8ezrlvcpJdTWAxqqiPihiM4C39hMqpl8ysPPQeMV2NagqSqdZTt ZvkQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from; bh=8GgLqYyVwPccAT0ZqRx9McXEiCvCNxuph0ZvEfF5TV8=; b=rvAUnUawOiwM72o1lgXcyktDYhIm+UYzYxb0wYjWHy9qy+HukCRW1Qm14XCa5kkLPr Z3aRk2qTGL5Fy8uBdq5qsnMxLlnN6/5bmKTM/a45RdEOJbcvYTym5XFFTzBB0m1VZMXU lwQd+lfdTQS9ehc8qP5J/B4+9qXI90Tg7dinLtqDNCV7jEGkyO6e7XMNajvBmy1sWAD8 hwRwLozTW/UJwfS/Gh249OfGRR9LBe0R7GLntG/OwmueVcDSlRUOZGMikTbhDIGFmb5o Ruoa+A+JSffC5cLq6ldxFkANyTO1YQqvMh54YX+0IQvGdytaZGRWueeDkz4RxtE3Neyo azoQ== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [23.128.96.18]) by mx.google.com with ESMTP id y23si3400162ejr.725.2020.12.05.07.26.51; Sat, 05 Dec 2020 07:27:29 -0800 (PST) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) client-ip=23.128.96.18; Authentication-Results: mx.google.com; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726249AbgLEPQU (ORCPT + 99 others); Sat, 5 Dec 2020 10:16:20 -0500 Received: from mail.kernel.org ([198.145.29.99]:44138 "EHLO mail.kernel.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726873AbgLEO73 (ORCPT ); Sat, 5 Dec 2020 09:59:29 -0500 From: Krzysztof Kozlowski Authentication-Results: mail.kernel.org; dkim=permerror (bad message/signature format) To: Dmitry Osipenko , Mikko Perttunen , Nicolas Chauvet , Georgi Djakov , Peter Geis , MyungJoo Ham , Viresh Kumar , Thierry Reding , Michael Turquette , Kyungmin Park , Stephen Boyd , Rob Herring , Jonathan Hunter , Peter De Schrijver , Chanwoo Choi Cc: Krzysztof Kozlowski , linux-tegra@vger.kernel.org, devicetree@vger.kernel.org, dri-devel@lists.freedesktop.org, linux-kernel@vger.kernel.org, linux-pm@vger.kernel.org Subject: Re: [PATCH v11 00/10] Introduce memory interconnect for NVIDIA Tegra SoCs Date: Sat, 5 Dec 2020 15:09:11 +0100 Message-Id: <160717730565.9414.18193998919736710677.b4-ty@kernel.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20201203192439.16177-1-digetx@gmail.com> References: <20201203192439.16177-1-digetx@gmail.com> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: 8bit Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Thu, 3 Dec 2020 22:24:29 +0300, Dmitry Osipenko wrote: > This series brings initial support for memory interconnect to Tegra20, > Tegra30 and Tegra124 SoCs. > > For the starter only display controllers and devfreq devices are getting > interconnect API support, others could be supported later on. The display > controllers have the biggest demand for interconnect API right now because > dynamic memory frequency scaling can't be done safely without taking into > account bandwidth requirement from the displays. In particular this series > fixes distorted display output on T30 Ouya and T124 TK1 devices. > > [...] Applied, thanks! [01/10] dt-bindings: memory: tegra20: emc: Document opp-supported-hw property [02/10] memory: tegra20: Support hardware versioning and clean up OPP table initialization [03/10] memory: tegra30: Support interconnect framework commit: 01a51facb74fb337ff9fe734caa85dd6e246ef48 Best regards, -- Krzysztof Kozlowski