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From:   Adam Ford <aford173@gmail.com>
Date:   Mon, 7 Dec 2020 09:51:33 -0600
Message-ID: <CAHCN7xJ8kmCxijvzpi+gj=R-QmPc6pqmsMzU5CRt3pQ9B98k+w@mail.gmail.com>
Subject: Re: [PATCH] clk: imx: Fix reparenting of UARTs not associated with sdout
To:     Sascha Hauer <s.hauer@pengutronix.de>
Cc:     linux-clk <linux-clk@vger.kernel.org>,
        Adam Ford-BE <aford@beaconembedded.com>,
        charles.steves@logicpd.com, Aisheng Dong <aisheng.dong@nxp.com>,
        Michael Turquette <mturquette@baylibre.com>,
        Stephen Boyd <sboyd@kernel.org>,
        Shawn Guo <shawnguo@kernel.org>,
        Pengutronix Kernel Team <kernel@pengutronix.de>,
        Fabio Estevam <festevam@gmail.com>,
        NXP Linux Team <linux-imx@nxp.com>,
        Linus Walleij <linus.walleij@linaro.org>,
        Jerome Brunet <jbrunet@baylibre.com>,
        arm-soc <linux-arm-kernel@lists.infradead.org>,
        Linux Kernel Mailing List <linux-kernel@vger.kernel.org>
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On Sun, Dec 6, 2020 at 11:24 PM Sascha Hauer <s.hauer@pengutronix.de> wrote:
>
> Hi Adam,
>
> On Fri, Dec 04, 2020 at 12:31:54PM -0600, Adam Ford wrote:
> > The default clock source on i.MX8M Mini and Nano boards use a 24MHz clock,
> > but users who need to re-parent the clock source run into issues because
> > all the UART clocks are enabled whether or not they're needed by sdout.
> >
> > Any attempt to change the parent results in an busy error because the
> > clocks have been enabled already.
> >
> >   clk: failed to reparent uart1 to sys_pll1_80m: -16
> >
> > Instead of pre-initializing all UARTS, scan the device tree to see if UART
> > clock is used as stdout before initializing it.  Only enable the UART clock
> > if it's needed in order to delay the clock initialization until after the
> > re-parenting of the clocks.
> >
> > Fixes: 9461f7b33d11c ("clk: fix CLK_SET_RATE_GATE with clock rate protection")
> > Suggested-by: Aisheng Dong <aisheng.dong@nxp.com>
> > Signed-off-by: Adam Ford <aford173@gmail.com>
> >
> > diff --git a/drivers/clk/imx/clk.c b/drivers/clk/imx/clk.c
> > index 47882c51cb85..6dcc5fbd8f3f 100644
> > --- a/drivers/clk/imx/clk.c
> > +++ b/drivers/clk/imx/clk.c
> > @@ -163,12 +163,18 @@ __setup_param("earlyprintk", imx_keep_uart_earlyprintk,
> >
> >  void imx_register_uart_clocks(struct clk ** const clks[])
> >  {
> > +     struct clk *uart_clk;
> >       if (imx_keep_uart_clocks) {
> >               int i;
> >
> >               imx_uart_clocks = clks;
> > -             for (i = 0; imx_uart_clocks[i]; i++)
> > -                     clk_prepare_enable(*imx_uart_clocks[i]);
> > +             for (i = 0; imx_uart_clocks[i]; i++) {
> > +                     uart_clk = of_clk_get(of_stdout, i);
>
> This looks wrong. imx_uart_clocks is an array containing all clocks that
> could possibly be used for an UART. With of_clk_get(of_stdout, i) you
> get the nth clock for one specific UART.
> What you have to do here is: For each of imx_uart_clocks[] you have to
> iterate over all clocks of the of_stdout node.

Sascha,

Thanks for the review.

I agree that I'm using the wrong index when checking of_stdout, but I
am not sure we need to loop through  imx_uart_clocks at all.
I looked at the NXP repo, and they just focus on looping through
of_stdout and don't reference the imx_uart_clocks. Can't we just loop
through the of_stdout and enable any clocks found in that?

adam


>
> Sascha
>
> > +                     if (IS_ERR(uart_clk))
> > +                             continue;
> > +                     clk_prepare_enable(uart_clk);
> > +                     clk_put(uart_clk);
> > +             }
> >       }
> >  }
> >
> > --
> > 2.25.1
> >
> >
>
> --
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