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[24.155.109.49]) by smtp.gmail.com with ESMTPSA id s9sm2749031otb.6.2020.12.07.08.59.45 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 07 Dec 2020 08:59:46 -0800 (PST) Received: (nullmailer pid 434629 invoked by uid 1000); Mon, 07 Dec 2020 16:59:45 -0000 Date: Mon, 7 Dec 2020 10:59:45 -0600 From: Rob Herring To: Liu Ying Cc: linux-arm-kernel@lists.infradead.org, dri-devel@lists.freedesktop.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, p.zabel@pengutronix.de, airlied@linux.ie, daniel@ffwll.ch, shawnguo@kernel.org, s.hauer@pengutronix.de, kernel@pengutronix.de, festevam@gmail.com, linux-imx@nxp.com, maarten.lankhorst@linux.intel.com, mripard@kernel.org, tzimmermann@suse.de, laurentiu.palcu@oss.nxp.com Subject: Re: [PATCH v3 2/6] dt-bindings: display: imx: Add i.MX8qxp/qm PRG binding Message-ID: <20201207165945.GA430214@robh.at.kernel.org> References: <1607311260-13983-1-git-send-email-victor.liu@nxp.com> <1607311260-13983-3-git-send-email-victor.liu@nxp.com> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <1607311260-13983-3-git-send-email-victor.liu@nxp.com> Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Mon, Dec 07, 2020 at 11:20:56AM +0800, Liu Ying wrote: > This patch adds bindings for i.MX8qxp/qm Display Prefetch Resolve Gasket. > > Signed-off-by: Liu Ying > --- > Note that this depends on the 'two cell binding' clock patch set which has > already landed in Shawn's i.MX clk/imx git branch. Otherwise, imx8-lpcg.h > won't be found. > > v2->v3: > * No change. > > v1->v2: > * Use new dt binding way to add clocks in the example. > > .../bindings/display/imx/fsl,imx8qxp-prg.yaml | 60 ++++++++++++++++++++++ > 1 file changed, 60 insertions(+) > create mode 100644 Documentation/devicetree/bindings/display/imx/fsl,imx8qxp-prg.yaml > > diff --git a/Documentation/devicetree/bindings/display/imx/fsl,imx8qxp-prg.yaml b/Documentation/devicetree/bindings/display/imx/fsl,imx8qxp-prg.yaml > new file mode 100644 > index 00000000..d59e2db > --- /dev/null > +++ b/Documentation/devicetree/bindings/display/imx/fsl,imx8qxp-prg.yaml > @@ -0,0 +1,60 @@ > +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) > +%YAML 1.2 > +--- > +$id: http://devicetree.org/schemas/display/imx/fsl,imx8qxp-prg.yaml# > +$schema: http://devicetree.org/meta-schemas/core.yaml# > + > +title: Freescale i.MX8qm/qxp Display Prefetch Resolve Gasket > + > +maintainers: > + - Liu Ying > + > +description: | > + The i.MX8qm/qxp Prefetch Resolve Gasket (PRG) is a gasket interface between > + RTRAM controller and Display Controller. The main function is to convert > + the AXI interface to the RTRAM interface, which includes re-mapping the > + ARADDR to a RTRAM address. > + > +properties: > + compatible: > + oneOf: > + - const: fsl,imx8qxp-prg > + - const: fsl,imx8qm-prg Use enum instead of oneOf+const. With that, Reviewed-by: Rob Herring > + > + reg: > + maxItems: 1 > + > + clocks: > + items: > + - description: rtram clock > + - description: apb clock > + > + clock-names: > + items: > + - const: rtram > + - const: apb > + > + power-domains: > + maxItems: 1 > + > +required: > + - compatible > + - reg > + - clocks > + - clock-names > + - power-domains > + > +additionalProperties: false > + > +examples: > + - | > + #include > + #include > + prg@56040000 { > + compatible = "fsl,imx8qxp-prg"; > + reg = <0x56040000 0x10000>; > + clocks = <&dc0_prg0_lpcg IMX_LPCG_CLK_0>, > + <&dc0_prg0_lpcg IMX_LPCG_CLK_4>; > + clock-names = "rtram", "apb"; > + power-domains = <&pd IMX_SC_R_DC_0>; > + }; > -- > 2.7.4 >