Received: by 2002:a05:6a10:f347:0:0:0:0 with SMTP id d7csp2848454pxu; Mon, 7 Dec 2020 18:15:54 -0800 (PST) X-Google-Smtp-Source: ABdhPJySjTmwrjp/RsFxXBBCw9GwFegKeHEgkCVzXk4DOSr/fCFTdQKHwWJDJUgkfEYnDeb/9jbc X-Received: by 2002:a17:906:5847:: with SMTP id h7mr20691540ejs.124.1607393753195; Mon, 07 Dec 2020 18:15:53 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1607393753; cv=none; d=google.com; s=arc-20160816; b=kUJmz8BQeoFRbUqoS+/pVquEJuuSHc6dZzSHc/3+ncOXUelQ7ZLgM1rmkGrFEHYANT YLhpf4w6JqYT0LUBC44HMIA0Je1Vi/z4qTt3TqFu1fuMwNMUHSl3wyBe8YSxrSMjrq3x pfADiX8MytZkaCXSugfwn+jg+b8HOmqK7sRuZflurXtzUWb0ZLKqC0+rxlxv5jCZsUlM m6z0s0YTxcw3iieXIGIXN/uJgqDjDz7ylRSlMrLugxQUF4M08CvDPLEbwZoBD9kU3m+k RJzh1tiAT4zkd2AUvvGbO4wp45NoYQ6To5y1ukOt+Ru72BuYfZwhD8XxxJIcxiDzucWS lLVg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:in-reply-to:content-disposition:mime-version :references:message-id:subject:cc:to:from:date; bh=WlIfP7XrB0aTvyn79KbeVgxX0saIy6AgoRJEbq0W+oU=; b=UrWQ5VA2mnlLHRHYSXYNa9DcLj8jSelWT2LgzO29ctLkUftgI8vCA6KODosz1zI3QG LzlmPPXB62/b7iAc/VipGAHicoJC1YTnhThQWvFVDCR8u8QBhx1pKs02JoeU9sUWm137 giIUlmQjHcOCVLcdD3oOfByFRQ+S7WvK+9sdbxwro2v85CdlbVVjP5C7wK6x3iP4pvvr Bfbmr5abNv4kEskgFQrN/M1ZXP0AB+WlQAk6DohvwyH6ZlsyMiLhZoLcjL5q8B8G8Hyj rBXkMKT19OvBp6P98nBqXET53H/WvFg/R/mTg+IaHbl3EwYQ1L+ER8YoZzmCyXN8s+24 nZZw== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [23.128.96.18]) by mx.google.com with ESMTP id x2si7695372ejb.174.2020.12.07.18.15.30; Mon, 07 Dec 2020 18:15:53 -0800 (PST) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) client-ip=23.128.96.18; Authentication-Results: mx.google.com; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1727756AbgLHCMR (ORCPT + 99 others); Mon, 7 Dec 2020 21:12:17 -0500 Received: from vps0.lunn.ch ([185.16.172.187]:43306 "EHLO vps0.lunn.ch" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726830AbgLHCMR (ORCPT ); Mon, 7 Dec 2020 21:12:17 -0500 Received: from andrew by vps0.lunn.ch with local (Exim 4.94) (envelope-from ) id 1kmSTT-00AjgY-LL; Tue, 08 Dec 2020 03:11:31 +0100 Date: Tue, 8 Dec 2020 03:11:31 +0100 From: Andrew Lunn To: Jean Pihet Cc: netdev@vger.kernel.org, LKML , Ryan Barnett , Conrad Ratschan , Hugo Cornelis , Arnout Vandecappelle Subject: Re: [PATCH v2] net: dsa: ksz8795: adjust CPU link to host interface Message-ID: <20201208021131.GE2475764@lunn.ch> References: <20201201083408.51006-1-jean.pihet@newoldbits.com> <20201201184100.GN2073444@lunn.ch> <20201201204516.GA2324545@lunn.ch> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Mon, Dec 07, 2020 at 08:43:32PM +0100, Jean Pihet wrote: > Hi Andrew, > > On Tue, Dec 1, 2020 at 9:45 PM Andrew Lunn wrote: > > > > > Configure the host port of the switch to match the host interface > > > settings. This is useful when the switch is directly connected to the > > > host MAC interface. > > > > Why do you need this when no other board does? Why is your board > > special? > > > > As i said before, i'm guessing your board has back to back PHYs > > between the SoC and the switch and nobody else does. Is that the > > reason why? Without this, nothing is configuring the switch MAC to the > > results of the auto-neg between the two PHYs? > > Yes that is the case. From here I see this patch is too specific to > our setup, and so cannot be considered for merging. Hi Jean I never said i was too specific to your board. There are other boards using different switches like this. This is where the commit message is so important. Without understanding Why? it is hard to point you in the right direction. So you setup is: SoC - MAC - PHY - PHY - MAC - Switch. The SoC MAC driver is looking after the first PHY? This patch is about the Switch MAC and PHY. You need the results of auto-neg from the PHY to be programmed into the MAC of the switch. If i remember correctly you just need a phy-handle in the CPU node, pointing at the PHY. See for example imx6q-b450v3.dts Andrew