Received: by 2002:a05:6a10:f347:0:0:0:0 with SMTP id d7csp2859454pxu; Mon, 7 Dec 2020 18:42:51 -0800 (PST) X-Google-Smtp-Source: ABdhPJyUKCFOv6j+6Z7jVYbTKJXsKLF8l8cPT/HdXPGQDRrWSn73HCk/WBCOCdpZXRLkZixAFQYZ X-Received: by 2002:a05:6402:1c8a:: with SMTP id cy10mr22760613edb.151.1607395371111; Mon, 07 Dec 2020 18:42:51 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1607395371; cv=none; d=google.com; s=arc-20160816; b=H6wB3ZCvYKY1W4vXL678Hwu4lrzoS71N6UBhZRSJh5JFTrFCJsWY/iAx46hCZsc6au weCmcwr4kxIYRP2/SPVC0n+HK3CpyWgF1TWce80tYsK+KjH54X6dCf+BSCF8H8NnVj/d uemOGwwAaeIDKRS+KNkJ6Vf3d93WHNUSN5DD/A+JHo7JR1p8yuL/seN0dxXgGfDj6aWj KQefUS7ibVB4+Wrf2FU6U3nK3BokaNgF847LZ9i8zxCqGjtOO3V786UlqgzNKTel2lVB XmYFrbXlpOJOvY/trLvRjJ8pYJZC0UONXq10Z/H5T345ptLEVwnqy+VU3gPvFWpMXACN iHtw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :message-id:date:subject:cc:to:from; bh=+QMO+mSiaT+k2n76lXCGRJXmcLHBDZ1FJAGK+B35W9s=; b=NcBonAwrjGs6WkZsOQcj6bfIZLZYvjgUWsgPxhVkvnmCM/a+ryyMGVuPvvxWnFQ1Wx PoKQMSV025zcFzT7eFTWBMwkM2XQvN0I1fIHDygRZL4zU7WA0GQRNKQcf5NgzFZtQFbJ 1I2HS/ChynBv7GaB6+EMZ4EPyTmqXoPmRxcRaXfsYL/l3embzfkYDyOhZh2Yy6R/2i7y CuMOs6GNCjjOsugOjcyt0mtOF0z85027WKnuF1xkOMO/1DHm8QopcTnbSjOnkkOx1HpC YEk/OwIRoyZRQ3bGOyjodDeHQdoED5a2gi9Ux+jCsgMFz/5AkXtdGS1VBORYClGa3siK 6AUw== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [23.128.96.18]) by mx.google.com with ESMTP id q7si9497962edc.249.2020.12.07.18.42.26; Mon, 07 Dec 2020 18:42:51 -0800 (PST) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) client-ip=23.128.96.18; Authentication-Results: mx.google.com; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1728084AbgLHCjG (ORCPT + 99 others); Mon, 7 Dec 2020 21:39:06 -0500 Received: from smtp2207-205.mail.aliyun.com ([121.197.207.205]:54282 "EHLO smtp2207-205.mail.aliyun.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1727816AbgLHCjF (ORCPT ); Mon, 7 Dec 2020 21:39:05 -0500 X-Alimail-AntiSpam: AC=CONTINUE;BC=0.1253207|-1;CH=green;DM=|CONTINUE|false|;DS=CONTINUE|ham_system_inform|0.123485-0.00280262-0.873712;FP=0|0|0|0|0|-1|-1|-1;HT=ay29a033018047204;MF=huangshuosheng@allwinnertech.com;NM=1;PH=DS;RN=9;RT=9;SR=0;TI=SMTPD_---.J4N61uS_1607395099; Received: from allwinnertech.com(mailfrom:huangshuosheng@allwinnertech.com fp:SMTPD_---.J4N61uS_1607395099) by smtp.aliyun-inc.com(10.147.41.158); Tue, 08 Dec 2020 10:38:21 +0800 From: Shuosheng Huang To: robh+dt@kernel.org, mripard@kernel.org, wens@csie.org, jernej.skrabec@siol.net, tiny.windzz@gmail.com Cc: devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, Shuosheng Huang Subject: [PATCH v3 3/6] arm64: dts: allwinner: a100: Add clocks to CPU cores Date: Tue, 8 Dec 2020 10:38:18 +0800 Message-Id: <20201208023818.22951-1-huangshuosheng@allwinnertech.com> X-Mailer: git-send-email 2.28.0 MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Add clocks to CPU cores for a100. Signed-off-by: Shuosheng Huang --- arch/arm64/boot/dts/allwinner/sun50i-a100.dtsi | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/arch/arm64/boot/dts/allwinner/sun50i-a100.dtsi b/arch/arm64/boot/dts/allwinner/sun50i-a100.dtsi index cc321c04f121..a669eb1fc965 100644 --- a/arch/arm64/boot/dts/allwinner/sun50i-a100.dtsi +++ b/arch/arm64/boot/dts/allwinner/sun50i-a100.dtsi @@ -23,6 +23,7 @@ cpu0: cpu@0 { device_type = "cpu"; reg = <0x0>; enable-method = "psci"; + clocks = <&ccu CLK_CPUX>; }; cpu@1 { @@ -30,6 +31,7 @@ cpu@1 { device_type = "cpu"; reg = <0x1>; enable-method = "psci"; + clocks = <&ccu CLK_CPUX>; }; cpu@2 { @@ -37,6 +39,7 @@ cpu@2 { device_type = "cpu"; reg = <0x2>; enable-method = "psci"; + clocks = <&ccu CLK_CPUX>; }; cpu@3 { @@ -44,6 +47,7 @@ cpu@3 { device_type = "cpu"; reg = <0x3>; enable-method = "psci"; + clocks = <&ccu CLK_CPUX>; }; }; -- 2.28.0