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Date:   Mon, 7 Dec 2020 18:04:44 -0800
From:   Jakub Kicinski <kuba@kernel.org>
To:     Jerome Brunet <jbrunet@baylibre.com>
Cc:     Martin Blumenstingl <martin.blumenstingl@googlemail.com>,
        davem@davemloft.net, netdev@vger.kernel.org,
        linux-amlogic@lists.infradead.org, linux-kernel@vger.kernel.org,
        linux-arm-kernel@lists.infradead.org
Subject: Re: [PATCH] net: stmmac: dwmac-meson8b: fix mask definition of the
 m250_sel mux
Message-ID: <20201207180444.2a48c366@kicinski-fedora-pc1c0hjn.DHCP.thefacebook.com>
In-Reply-To: <1jo8j62c8t.fsf@starbuckisacylon.baylibre.com>
References: <20201205213207.519341-1-martin.blumenstingl@googlemail.com>
        <1jo8j62c8t.fsf@starbuckisacylon.baylibre.com>
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On Mon, 07 Dec 2020 10:31:46 +0100 Jerome Brunet wrote:
> > The m250_sel mux clock uses bit 4 in the PRG_ETH0 register. Fix this by
> > shifting the PRG_ETH0_CLK_M250_SEL_MASK accordingly as the "mask" in
> > struct clk_mux expects the mask relative to the "shift" field in the
> > same struct.
> >
> > While here, get rid of the PRG_ETH0_CLK_M250_SEL_SHIFT macro and use
> > __ffs() to determine it from the existing PRG_ETH0_CLK_M250_SEL_MASK
> > macro.
> >
> > Fixes: 566e8251625304 ("net: stmmac: add a glue driver for the Amlogic Meson 8b / GXBB DWMAC")
> > Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>  
> 
> Reviewed-by: Jerome Brunet <jbrunet@baylibre.com>

Applied, thanks!