Received: by 2002:a05:6a10:f347:0:0:0:0 with SMTP id d7csp2973135pxu; Mon, 7 Dec 2020 23:22:56 -0800 (PST) X-Google-Smtp-Source: ABdhPJyY5I+qWVvyxzZXpCwpanlSZQ9HzVJZjfys5+uFjQG+ZG1mC3iJwiOIuZ4jwr8tMaO5LL59 X-Received: by 2002:a17:906:da08:: with SMTP id fi8mr22115987ejb.517.1607412175828; Mon, 07 Dec 2020 23:22:55 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1607412175; cv=none; d=google.com; s=arc-20160816; b=NWGrz6k4kfUvoPstAYf48Q8J4/qOQ+EJup7Uh0GSW21cK+hQ87WRH3wX3fH6HAFmoM jyx/kS+n+GvIrUiGHQfFw+2dROIfheHbNPM8FHDwg0mXhH69s6BrBRPwU30LoXv51egw 4eNYCr5x29W6eaRPZKHmRe/MYZjL68dL4Edi0K4ASMfzGDkJq7VK6kf3rqPkkteIASx2 GP/Glv5MZLhjQQ+a3Sw8PBFEg3z9U8anzMvxXeTg+fqx86KxbqKkH8QLLNFPi4InbH7t qUqX5DnmEkl0C6HIyPwtpwK7ornwP95kJWNWKHoFBsPPUDth8wcf7VNDiLLAIh+YMNOw XsRg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :message-id:date:subject:cc:to:from; bh=+QMO+mSiaT+k2n76lXCGRJXmcLHBDZ1FJAGK+B35W9s=; b=iX2wg1JuFaDgjbeVJYupglBbcpmN/4xEXV18F7tD/Ktw2OnMfAlmBm2V+LaVApM7r7 69vXCGXvv2HQFgSRFjndRj/EYlmsAPcqDTymGmiaj1nL3O9qN9Shi4MVgOiO6GiNw5Al lK9r0O/hPY55IRlz8qQ5f0SMr2FThANvcFQM4DoMzC/uwkQsrVAcdIw1JwXtEobx37oK G6OG/qeLCYZZhbtkMpmybdUykHv7klchgEj7fMfUpapJruzqy2ZAsn3wDoJa7Cs6i2Qi E7FRRijWlK5KU4gcMaeXRvzXP2HRTnvSZupHOABoBiKeQmJpM9gIExBo184zJjIUp973 8sVg== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [23.128.96.18]) by mx.google.com with ESMTP id w6si8107129edt.581.2020.12.07.23.22.33; Mon, 07 Dec 2020 23:22:55 -0800 (PST) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) client-ip=23.128.96.18; Authentication-Results: mx.google.com; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726278AbgLHHVN (ORCPT + 99 others); Tue, 8 Dec 2020 02:21:13 -0500 Received: from smtp2207-205.mail.aliyun.com ([121.197.207.205]:57026 "EHLO smtp2207-205.mail.aliyun.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1725768AbgLHHVM (ORCPT ); Tue, 8 Dec 2020 02:21:12 -0500 X-Alimail-AntiSpam: AC=CONTINUE;BC=0.1268838|-1;CH=green;DM=|CONTINUE|false|;DS=CONTINUE|ham_system_inform|0.123485-0.00280262-0.873712;FP=4939714851174842411|1|1|6|0|-1|-1|-1;HT=ay29a033018047206;MF=huangshuosheng@allwinnertech.com;NM=1;PH=DS;RN=9;RT=9;SR=0;TI=SMTPD_---.J4UGwVh_1607412025; Received: from allwinnertech.com(mailfrom:huangshuosheng@allwinnertech.com fp:SMTPD_---.J4UGwVh_1607412025) by smtp.aliyun-inc.com(10.147.43.230); Tue, 08 Dec 2020 15:20:28 +0800 From: Shuosheng Huang To: robh+dt@kernel.org, mripard@kernel.org, wens@csie.org, jernej.skrabec@siol.net, tiny.windzz@gmail.com Cc: devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, Shuosheng Huang Subject: [PATCH v4 3/6] arm64: dts: allwinner: a100: Add clocks to CPU cores Date: Tue, 8 Dec 2020 15:20:23 +0800 Message-Id: <20201208072023.17707-1-huangshuosheng@allwinnertech.com> X-Mailer: git-send-email 2.28.0 MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Add clocks to CPU cores for a100. Signed-off-by: Shuosheng Huang --- arch/arm64/boot/dts/allwinner/sun50i-a100.dtsi | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/arch/arm64/boot/dts/allwinner/sun50i-a100.dtsi b/arch/arm64/boot/dts/allwinner/sun50i-a100.dtsi index cc321c04f121..a669eb1fc965 100644 --- a/arch/arm64/boot/dts/allwinner/sun50i-a100.dtsi +++ b/arch/arm64/boot/dts/allwinner/sun50i-a100.dtsi @@ -23,6 +23,7 @@ cpu0: cpu@0 { device_type = "cpu"; reg = <0x0>; enable-method = "psci"; + clocks = <&ccu CLK_CPUX>; }; cpu@1 { @@ -30,6 +31,7 @@ cpu@1 { device_type = "cpu"; reg = <0x1>; enable-method = "psci"; + clocks = <&ccu CLK_CPUX>; }; cpu@2 { @@ -37,6 +39,7 @@ cpu@2 { device_type = "cpu"; reg = <0x2>; enable-method = "psci"; + clocks = <&ccu CLK_CPUX>; }; cpu@3 { @@ -44,6 +47,7 @@ cpu@3 { device_type = "cpu"; reg = <0x3>; enable-method = "psci"; + clocks = <&ccu CLK_CPUX>; }; }; -- 2.28.0