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Subject: Re: [PATCH v2 2/4] spi: Add devicetree bindings documentation for
 Loongson SPI
To:     Qing Zhang <zhangqing@loongson.cn>,
        Mark Brown <broonie@kernel.org>,
        Rob Herring <robh+dt@kernel.org>,
        Thomas Bogendoerfer <tsbogend@alpha.franken.de>
Cc:     linux-spi@vger.kernel.org, Huacai Chen <chenhc@lemote.com>,
        Jiaxun Yang <jiaxun.yang@flygoat.com>,
        devicetree@vger.kernel.org, linux-mips@vger.kernel.org,
        linux-kernel@vger.kernel.org, gaojuxin@loongson.cn,
        yangtiezhu@loongson.cn
References: <1607413467-17698-1-git-send-email-zhangqing@loongson.cn>
 <1607413467-17698-2-git-send-email-zhangqing@loongson.cn>
From:   Sergei Shtylyov <sergei.shtylyov@gmail.com>
Organization: Brain-dead Software
Message-ID: <b97c4d59-3279-f67d-d951-1e9436faa640@gmail.com>
Date:   Tue, 8 Dec 2020 11:40:07 +0300
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Hello!

On 08.12.2020 10:44, Qing Zhang wrote:

> Add spi-ls7a binding documentation.
> 
> Signed-off-by: Qing Zhang <zhangqing@loongson.cn>
> ---
>   Documentation/devicetree/bindings/spi/spi-ls7a.txt | 31 ++++++++++++++++++++++
>   1 file changed, 31 insertions(+)
>   create mode 100644 Documentation/devicetree/bindings/spi/spi-ls7a.txt
> 
> diff --git a/Documentation/devicetree/bindings/spi/spi-ls7a.txt b/Documentation/devicetree/bindings/spi/spi-ls7a.txt
> new file mode 100644
> index 0000000..56247b5
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/spi/spi-ls7a.txt
> @@ -0,0 +1,31 @@
> +Binding for LOONGSON LS7A SPI controller
> +
> +Required properties:
> +- compatible: should be "pci0014,7a0b.0","pci0014,7a0b","pciclass088000","pciclass0880".
> +- reg: reference IEEE Std 1275-1994.
> +- #address-cells: <1>, as required by generic SPI binding.
> +- #size-cells: <0>, also as required by generic SPI binding.
> +- #interrupts: No hardware interrupt.

    You say it's a required prop, yet yuoe example doesn't have it...

> +
> +Child nodes as per the generic SPI binding.
> +
> +Example:
> +
> +			spi@16,0 {
> +				compatible = "pci0014,7a0b.0",
> +						"pci0014,7a0b",
> +						"pciclass088000",
> +						"pciclass0880";
> +
> +				#address-cells = <1>;
> +				#size-cells = <0>;
> +				reg = <0xb000 0x0 0x0 0x0 0x0>;
> +				num-chipselects = <0>;
> +				spiflash: s25fl016k@0 {
> +				#address-cells = <1>;
> +				#size-cells = <1>;

    Once more?

> +				compatible ="spansion,s25fl016k","jedec,spi-nor";

    Once more?

> +				spi-max-frequency=<50000000>;
> +				reg=<0>;

    Once more? Did you mean this for a child node?

> +				};
> +			};

MBR, Sergei