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[23.128.96.18]) by mx.google.com with ESMTP id 88si9781222edr.151.2020.12.08.01.07.49; Tue, 08 Dec 2020 01:08:12 -0800 (PST) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) client-ip=23.128.96.18; Authentication-Results: mx.google.com; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=puri.sm Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1728799AbgLHJFx (ORCPT + 99 others); Tue, 8 Dec 2020 04:05:53 -0500 Received: from honk.sigxcpu.org ([24.134.29.49]:60434 "EHLO honk.sigxcpu.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1728585AbgLHJFm (ORCPT ); Tue, 8 Dec 2020 04:05:42 -0500 Received: from localhost (localhost [127.0.0.1]) by honk.sigxcpu.org (Postfix) with ESMTP id DA323FB03; Tue, 8 Dec 2020 10:04:58 +0100 (CET) X-Virus-Scanned: Debian amavisd-new at honk.sigxcpu.org Received: from honk.sigxcpu.org ([127.0.0.1]) by localhost (honk.sigxcpu.org [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id eamRw-rT4nRv; Tue, 8 Dec 2020 10:04:57 +0100 (CET) Received: by bogon.sigxcpu.org (Postfix, from userid 1000) id 4480C4068D; Tue, 8 Dec 2020 10:04:57 +0100 (CET) Date: Tue, 8 Dec 2020 10:04:57 +0100 From: Guido =?iso-8859-1?Q?G=FCnther?= To: Liu Ying Cc: linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, dri-devel@lists.freedesktop.org, linux-arm-kernel@lists.infradead.org, kishon@ti.com, vkoul@kernel.org, robh+dt@kernel.org, a.hajda@samsung.com, narmstrong@baylibre.com, Laurent.pinchart@ideasonboard.com, jonas@kwiboo.se, jernej.skrabec@siol.net, airlied@linux.ie, daniel@ffwll.ch, shawnguo@kernel.org, s.hauer@pengutronix.de, kernel@pengutronix.de, festevam@gmail.com, linux-imx@nxp.com, robert.chiras@nxp.com, martin.kepplinger@puri.sm Subject: Re: [PATCH 1/4] drm/bridge: nwl-dsi: Set PHY mode in nwl_dsi_enable() Message-ID: <20201208090457.GB20575@bogon.m.sigxcpu.org> References: <1607067224-15616-1-git-send-email-victor.liu@nxp.com> <1607067224-15616-2-git-send-email-victor.liu@nxp.com> MIME-Version: 1.0 Content-Type: text/plain; charset=iso-8859-1 Content-Disposition: inline Content-Transfer-Encoding: 8bit In-Reply-To: <1607067224-15616-2-git-send-email-victor.liu@nxp.com> Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Hi, On Fri, Dec 04, 2020 at 03:33:41PM +0800, Liu Ying wrote: > The Northwest Logic MIPI DSI host controller embedded in i.MX8qxp > works with a Mixel MIPI DPHY + LVDS PHY combo to support either > a MIPI DSI display or a LVDS display. So, this patch calls > phy_set_mode() from nwl_dsi_enable() to set PHY mode to MIPI DPHY > explicitly. > > Cc: Guido G?nther > Cc: Robert Chiras > Cc: Martin Kepplinger > Cc: Andrzej Hajda > Cc: Neil Armstrong > Cc: Laurent Pinchart > Cc: Jonas Karlman > Cc: Jernej Skrabec > Cc: David Airlie > Cc: Daniel Vetter > Cc: NXP Linux Team > Signed-off-by: Liu Ying > --- > drivers/gpu/drm/bridge/nwl-dsi.c | 6 ++++++ > 1 file changed, 6 insertions(+) > > diff --git a/drivers/gpu/drm/bridge/nwl-dsi.c b/drivers/gpu/drm/bridge/nwl-dsi.c > index 66b6740..be6bfc5 100644 > --- a/drivers/gpu/drm/bridge/nwl-dsi.c > +++ b/drivers/gpu/drm/bridge/nwl-dsi.c > @@ -678,6 +678,12 @@ static int nwl_dsi_enable(struct nwl_dsi *dsi) > return ret; > } > > + ret = phy_set_mode(dsi->phy, PHY_MODE_MIPI_DPHY); > + if (ret < 0) { > + DRM_DEV_ERROR(dev, "Failed to set DSI phy mode: %d\n", ret); > + goto uninit_phy; > + } > + > ret = phy_configure(dsi->phy, phy_cfg); > if (ret < 0) { > DRM_DEV_ERROR(dev, "Failed to configure DSI phy: %d\n", ret); Reviewed-by: Guido G?nther -- Guido > -- > 2.7.4 >