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Peter Anvin" , Paolo Bonzini , Jonathan Corbet , Jim Mattson , Wanpeng Li , "open list:KERNEL SELFTEST FRAMEWORK" , Marcelo Tosatti , Sean Christopherson , open list , Ingo Molnar , "maintainer:X86 ARCHITECTURE (32-BIT AND 64-BIT)" , Joerg Roedel , Borislav Petkov , Shuah Khan , Andrew Jones , Oliver Upton , "open list:DOCUMENTATION" , kvm@vger.kernel.org Subject: Re: [PATCH v2 1/3] KVM: x86: implement KVM_{GET|SET}_TSC_STATE Message-ID: <20201208094809.GT2414@hirez.programming.kicks-ass.net> References: <20201203171118.372391-1-mlevitsk@redhat.com> <20201203171118.372391-2-mlevitsk@redhat.com> <87a6uq9abf.fsf@nanos.tec.linutronix.de> <1dbbeefc7c76c259b55582468ccd3aab35a6de60.camel@redhat.com> <87im9dlpsw.fsf@vitty.brq.redhat.com> <875z5d5x9m.fsf@nanos.tec.linutronix.de> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <875z5d5x9m.fsf@nanos.tec.linutronix.de> Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Mon, Dec 07, 2020 at 06:41:41PM +0100, Thomas Gleixner wrote: > Right this happens still occasionally, but for quite some time this is > 100% firmware sillyness and not a fundamental property of the hardware > anymore. Ever since Nehalem (2008) TSC is synchronized on <= 2 sockets, and any observed deviation is firmware fail. I don't remember exactly where 4 socket and up got reliable. (there's the physical hotplug case, but let's not make this complicated) AMD has had Constant TSC since Barcelona which is roughly the same timeframe IIRC. So basically every TSC fail in the last decase is due to firmware being shit.