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Date:   Tue, 8 Dec 2020 23:40:52 +0530
From:   Pratyush Yadav <p.yadav@ti.com>
To:     Tudor Ambarus <tudor.ambarus@microchip.com>,
        Miquel Raynal <miquel.raynal@bootlin.com>,
        Richard Weinberger <richard@nod.at>,
        Vignesh Raghavendra <vigneshr@ti.com>,
        <linux-mtd@lists.infradead.org>, <linux-kernel@vger.kernel.org>
Subject: Re: [PATCH v3 1/3] UBI: Do not zero out EC and VID on ECC-ed NOR
 flashes
Message-ID: <20201208181050.z747aiiccoxj6xqz@ti.com>
References: <20201201102711.8727-1-p.yadav@ti.com>
 <20201201102711.8727-2-p.yadav@ti.com>
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Richard,

On 01/12/20 03:57PM, Pratyush Yadav wrote:
> For NOR flashes EC and VID are zeroed out before an erase is issued to
> make sure UBI does not mistakenly treat the PEB as used and associate it
> with an LEB.
> 
> But on some flashes, like the Cypress Semper S28 SPI NOR flash family,
> multi-pass page programming is not allowed on the default ECC scheme.
> This means zeroing out these magic numbers will result in the flash
> throwing a page programming error.
> 
> Do not zero out EC and VID for such flashes. A writesize > 1 is an
> indication of an ECC-ed flash.

Patches 2/3 and 3/3 have been picked up in the spi-nor tree. Can you 
please pick this patch up?

-- 
Regards,
Pratyush Yadav
Texas Instruments India