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[68.147.0.187]) by smtp.gmail.com with ESMTPSA id nm6sm3966801pjb.25.2020.12.08.10.26.52 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 08 Dec 2020 10:26:52 -0800 (PST) From: Mathieu Poirier To: gregkh@linuxfoundation.org Cc: linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org Subject: [PATCH 0/3] coresight: Patches for v5.11 (part 2) Date: Tue, 8 Dec 2020 11:26:48 -0700 Message-Id: <20201208182651.1597945-1-mathieu.poirier@linaro.org> X-Mailer: git-send-email 2.25.1 MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Good morning, As expected a few more fixes came late in the cycle - please see if you can include them in the v5.11 cycle. Applies cleanly on today's char-misc-next (ee64ed8153ab). Thanks, Mathieu Arnd Bergmann (1): coresight: remove broken __exit annotations Qi Liu (1): coresight: etm4x: Modify core-commit to avoid HiSilicon ETM overflow Suzuki K Poulose (1): coresight: tmc-etr: Fix barrier packet insertion for perf buffer drivers/hwtracing/coresight/Kconfig | 8 ++ drivers/hwtracing/coresight/coresight-catu.c | 2 +- .../hwtracing/coresight/coresight-cti-core.c | 2 +- drivers/hwtracing/coresight/coresight-etb10.c | 2 +- .../coresight/coresight-etm3x-core.c | 4 +- .../coresight/coresight-etm4x-core.c | 102 +++++++++++++++++- drivers/hwtracing/coresight/coresight-etm4x.h | 8 ++ .../hwtracing/coresight/coresight-funnel.c | 6 +- .../coresight/coresight-replicator.c | 6 +- drivers/hwtracing/coresight/coresight-stm.c | 2 +- .../hwtracing/coresight/coresight-tmc-core.c | 2 +- .../hwtracing/coresight/coresight-tmc-etr.c | 2 +- drivers/hwtracing/coresight/coresight-tpiu.c | 2 +- 13 files changed, 131 insertions(+), 17 deletions(-) -- 2.25.1