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[23.128.96.18]) by mx.google.com with ESMTP id u26si188823ejx.267.2020.12.08.21.10.26; Tue, 08 Dec 2020 21:10:48 -0800 (PST) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) client-ip=23.128.96.18; Authentication-Results: mx.google.com; dkim=pass header.i=@mg.codeaurora.org header.s=smtp header.b=F6onVl1S; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1727048AbgLIFHh (ORCPT + 99 others); Wed, 9 Dec 2020 00:07:37 -0500 Received: from so254-31.mailgun.net ([198.61.254.31]:40248 "EHLO so254-31.mailgun.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1725765AbgLIFHh (ORCPT ); Wed, 9 Dec 2020 00:07:37 -0500 DKIM-Signature: a=rsa-sha256; v=1; c=relaxed/relaxed; d=mg.codeaurora.org; q=dns/txt; s=smtp; t=1607490431; h=Content-Transfer-Encoding: Content-Type: In-Reply-To: MIME-Version: Date: Message-ID: From: References: Cc: To: Subject: Sender; bh=bKlS13OKovC/hMZP80c7Hc1j/4EzBCGWuZwSdCxtfdc=; b=F6onVl1SCsp2DiL7K3sl05+pKeAZ1gcEsQ0bxl15FlRawTpJOSUrQ4lIdsX3oUmFIM903H0+ sh6UknNIHpaXSPyO2CR09S5w8hPCIgwYLhy4TNUIIeGeCXG1V1BtIlrLGIlEFcTurP/Djhc2 sRsylcS6sLlk41CNbbmgysiGpqc= X-Mailgun-Sending-Ip: 198.61.254.31 X-Mailgun-Sid: WyI0MWYwYSIsICJsaW51eC1rZXJuZWxAdmdlci5rZXJuZWwub3JnIiwgImJlOWU0YSJd Received: from smtp.codeaurora.org (ec2-35-166-182-171.us-west-2.compute.amazonaws.com [35.166.182.171]) by smtp-out-n05.prod.us-west-2.postgun.com with SMTP id 5fd05b7ed5b4c78a8fd33a90 (version=TLS1.2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256); Wed, 09 Dec 2020 05:07:10 GMT Sender: mkshah=codeaurora.org@mg.codeaurora.org Received: by smtp.codeaurora.org (Postfix, from userid 1001) id 8E1A7C433ED; Wed, 9 Dec 2020 05:07:10 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-caf-mail-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-2.9 required=2.0 tests=ALL_TRUSTED,BAYES_00, NICE_REPLY_A,SPF_FAIL,URIBL_BLOCKED autolearn=no autolearn_force=no version=3.4.0 Received: from [192.168.29.129] (unknown [49.36.77.97]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) (Authenticated sender: mkshah) by smtp.codeaurora.org (Postfix) with ESMTPSA id E55DEC433C6; Wed, 9 Dec 2020 05:07:03 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 smtp.codeaurora.org E55DEC433C6 Authentication-Results: aws-us-west-2-caf-mail-1.web.codeaurora.org; dmarc=none (p=none dis=none) header.from=codeaurora.org Authentication-Results: aws-us-west-2-caf-mail-1.web.codeaurora.org; spf=fail smtp.mailfrom=mkshah@codeaurora.org Subject: Re: [PATCH v2 1/3] irqchip: qcom-pdc: Fix phantom irq when changing between rising/falling To: Douglas Anderson , Marc Zyngier , Thomas Gleixner , Jason Cooper , Linus Walleij Cc: linux-gpio@vger.kernel.org, Neeraj Upadhyay , Stephen Boyd , Bjorn Andersson , Srinivas Ramana , linux-arm-msm@vger.kernel.org, Rajendra Nayak , Andy Gross , Archana Sathyakumar , Lina Iyer , linux-kernel@vger.kernel.org References: <20201124094636.v2.1.I2702919afc253e2a451bebc3b701b462b2d22344@changeid> From: Maulik Shah Message-ID: Date: Wed, 9 Dec 2020 10:37:01 +0530 User-Agent: Mozilla/5.0 (Windows NT 10.0; Win64; x64; rv:78.0) Gecko/20100101 Thunderbird/78.5.1 MIME-Version: 1.0 In-Reply-To: <20201124094636.v2.1.I2702919afc253e2a451bebc3b701b462b2d22344@changeid> Content-Type: text/plain; charset=utf-8; format=flowed Content-Transfer-Encoding: 8bit Content-Language: en-GB Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Hi Doug, On 11/24/2020 11:17 PM, Douglas Anderson wrote: > We have a problem if we use gpio-keys and configure wakeups such that > we only want one edge to wake us up. AKA: > wakeup-event-action = ; > wakeup-source; > > Specifically we end up with a phantom interrupt that blocks suspend if > the line was already high and we want wakeups on rising edges (AKA we > want the GPIO to go low and then high again before we wake up). The > opposite is also problematic. > > Specifically, here's what's happening today: > 1. Normally, gpio-keys configures to look for both edges. Due to the > current workaround introduced in commit c3c0c2e18d94 ("pinctrl: > qcom: Handle broken/missing PDC dual edge IRQs on sc7180"), if the > line was high we'd configure for falling edges. > 2. At suspend time, we change to look for rising edges. > 3. After qcom_pdc_gic_set_type() runs, we get a phantom interrupt. > > We can solve this by just clearing the phantom interrupt. > > NOTE: it is possible that this could cause problems for a client with > very specific needs, but there's not much we can do with this > hardware. As an example, let's say the interrupt signal is currently > high and the client is looking for falling edges. The client now > changes to look for rising edges. The client could possibly expect > that if the line has a short pulse low (and back high) that it would > always be detected. Specifically no matter when the pulse happened, > it should either have tripped the (old) falling edge trigger or the > (new) rising edge trigger. We will simply not trip it. We could > narrow down the race a bit by polling our parent before changing > types, but no matter what we do there will still be a period of time > where we can't tell the difference between a real transition (or more > than one transition) and the phantom. > > Fixes: f55c73aef890 ("irqchip/pdc: Add PDC interrupt controller for QCOM SoCs") > Signed-off-by: Douglas Anderson > Reviewed-by: Maulik Shah > Tested-by: Maulik Shah > --- > There are no dependencies between this patch and patch #2/#3. It can > go in by itself. Patches are only grouped together in one series > because they address similar issues. > > Changes in v2: > - 0 => false > - If irq_chip_set_type_parent() fails don't bother clearing. > - Add Fixes tag. > > drivers/irqchip/qcom-pdc.c | 21 ++++++++++++++++++++- > 1 file changed, 20 insertions(+), 1 deletion(-) > > diff --git a/drivers/irqchip/qcom-pdc.c b/drivers/irqchip/qcom-pdc.c > index bd39e9de6ecf..f91e7d5aea25 100644 > --- a/drivers/irqchip/qcom-pdc.c > +++ b/drivers/irqchip/qcom-pdc.c > @@ -159,6 +159,8 @@ static int qcom_pdc_gic_set_type(struct irq_data *d, unsigned int type) > { > int pin_out = d->hwirq; > enum pdc_irq_config_bits pdc_type; > + enum pdc_irq_config_bits old_pdc_type; > + int ret; > > if (pin_out == GPIO_NO_WAKE_IRQ) > return 0; > @@ -187,9 +189,26 @@ static int qcom_pdc_gic_set_type(struct irq_data *d, unsigned int type) > return -EINVAL; > } > > + old_pdc_type = pdc_reg_read(IRQ_i_CFG, pin_out); > pdc_reg_write(IRQ_i_CFG, pin_out, pdc_type); > > - return irq_chip_set_type_parent(d, type); > + ret = irq_chip_set_type_parent(d, type); > + if (ret) > + return ret; > + > + /* > + * When we change types the PDC can give a phantom interrupt. > + * Clear it. Specifically the phantom shows up if a line is already > + * high and we change to rising or if a line is already low and we > + * change to falling but let's be consistent and clear it always. > + * > + * Doing this works because we have IRQCHIP_SET_TYPE_MASKED so the > + * interrupt will be cleared before the rest of the system sees it. > + */ Got confirmation that the phantom can show up when we change the polarity of the interrupt without changing the state of the signal. Can you please change above comment to include above when you spin v3.  * When we change types the PDC can give a phantom interrupt.  * Clear it.  Specifically the phantom shows up when reconfiguring  * polarity of interrupt without changing the state of the signal  * but let's be consistent and clear it always.  *  * Doing this works because .... Thanks, Maulik > + if (old_pdc_type != pdc_type) > + irq_chip_set_parent_state(d, IRQCHIP_STATE_PENDING, false); > + > + return 0; > } > > static struct irq_chip qcom_pdc_gic_chip = { -- QUALCOMM INDIA, on behalf of Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum, hosted by The Linux Foundation