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Date:   Thu, 10 Dec 2020 09:20:00 +1100
From:   Stephen Rothwell <sfr@canb.auug.org.au>
To:     Randy Dunlap <rdunlap@infradead.org>
Cc:     Linux Next Mailing List <linux-next@vger.kernel.org>,
        Saeed Mahameed <saeedm@nvidia.com>,
        Leon Romanovsky <leonro@nvidia.com>,
        Linux Kernel Mailing List <linux-kernel@vger.kernel.org>,
        "netdev@vger.kernel.org" <netdev@vger.kernel.org>,
        "linux-rdma@vger.kernel.org" <linux-rdma@vger.kernel.org>,
        Chris Mi <cmi@nvidia.com>
Subject: Re: linux-next: Tree for Dec 9 (ethernet/mellanox/mlx5)
Message-ID: <20201210092000.4c28192c@canb.auug.org.au>
In-Reply-To: <e5519ac6-1d25-632a-9b55-087d8ffaf386@infradead.org>
References: <20201209214447.3bfdeb87@canb.auug.org.au>
        <e5519ac6-1d25-632a-9b55-087d8ffaf386@infradead.org>
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Hi all,

On Wed, 9 Dec 2020 12:14:39 -0800 Randy Dunlap <rdunlap@infradead.org> wrot=
e:
>
> On 12/9/20 2:44 AM, Stephen Rothwell wrote:
> > Hi all,
> >=20
> > Changes since 20201208:
> >  =20
>=20
> on i386:
>=20
> I see this warning:/note: repeated 106 times on i386 build:
>=20
>                  from ../drivers/net/ethernet/mellanox/mlx5/core/alloc.c:=
34:
> ../include/vdso/bits.h:7:26: warning: left shift count >=3D width of type=
 [-Wshift-count-overflow]
>  #define BIT(nr)   (UL(1) << (nr))
>                           ^
> ../include/linux/mlx5/mlx5_ifc.h:10716:46: note: in expansion of macro =
=E2=80=98BIT=E2=80=99
>   MLX5_HCA_CAP_GENERAL_OBJECT_TYPES_SAMPLER =3D BIT(0x20),
>                                               ^~~

Introduced by commit

  2a2970891647 ("net/mlx5: Add sample offload hardware bits and structures")

now in the net-next tree.
--=20
Cheers,
Stephen Rothwell

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