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Date:   Wed, 9 Dec 2020 21:55:54 -0600
From:   Rob Herring <robh@kernel.org>
To:     Yash Shah <yash.shah@sifive.com>
Cc:     linux-spi@vger.kernel.org, linux-serial@vger.kernel.org,
        broonie@kernel.org, linux-riscv@lists.infradead.org,
        linux-i2c@vger.kernel.org, lee.jones@linaro.org,
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        linux-gpio@vger.kernel.org, peter@korsgaard.com,
        robh+dt@kernel.org, paul.walmsley@sifive.com,
        aou@eecs.berkeley.edu, u.kleine-koenig@pengutronix.de,
        bgolaszewski@baylibre.com, gregkh@linuxfoundation.org,
        thierry.reding@gmail.com, linux-pwm@vger.kernel.org,
        linus.walleij@linaro.org, andrew@lunn.ch,
        devicetree@vger.kernel.org
Subject: Re: [PATCH v2 1/9] dt-bindings: riscv: Update DT binding docs to
 support SiFive FU740 SoC
Message-ID: <20201210035554.GA1632991@robh.at.kernel.org>
References: <1607403341-57214-1-git-send-email-yash.shah@sifive.com>
 <1607403341-57214-2-git-send-email-yash.shah@sifive.com>
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On Tue, 08 Dec 2020 10:25:33 +0530, Yash Shah wrote:
> Add new compatible strings in cpus.yaml to support the E71 and U74 CPU
> cores ("harts") that are present on FU740-C000 SoC.
> 
> Signed-off-by: Yash Shah <yash.shah@sifive.com>
> ---
>  Documentation/devicetree/bindings/riscv/cpus.yaml | 6 ++++++
>  1 file changed, 6 insertions(+)
> 

Reviewed-by: Rob Herring <robh@kernel.org>