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Thu, 10 Dec 2020 08:48:56 +0000 From: franck.lenormand@oss.nxp.com To: shawnguo@kernel.org, s.hauer@pengutronix.de, festevam@gmail.com Cc: franck.lenormand@oss.nxp.com, kernel@pengutronix.de, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-imx@nxp.com, aisheng.dong@nxp.com, abel.vesa@nxp.com, Anson.Huang@nxp.com, linux@rempel-privat.de, daniel.baluta@nxp.com, qiangqing.zhang@nxp.com, peng.fan@nxp.com Subject: [PATCH v4 3/5] dt-bindings: firmware: imx-scu: Add SECVIO resource Date: Thu, 10 Dec 2020 09:48:48 +0100 Message-Id: <1607590130-11065-4-git-send-email-franck.lenormand@oss.nxp.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1607590130-11065-1-git-send-email-franck.lenormand@oss.nxp.com> References: <1607590130-11065-1-git-send-email-franck.lenormand@oss.nxp.com> Content-Type: text/plain X-Originating-IP: [81.1.10.98] X-ClientProxiedBy: AM0PR04CA0104.eurprd04.prod.outlook.com (2603:10a6:208:be::45) To AM4PR0401MB2401.eurprd04.prod.outlook.com (2603:10a6:200:47::26) MIME-Version: 1.0 X-MS-Exchange-MessageSentRepresentingType: 1 Received: from SOPDPUATS05.ea.freescale.net (81.1.10.98) by AM0PR04CA0104.eurprd04.prod.outlook.com (2603:10a6:208:be::45) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256) id 15.20.3654.12 via Frontend Transport; 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X-MS-Exchange-AntiSpam-MessageData: =?us-ascii?Q?QZ+cmE3ZS6+5jNFsRBUcBR7qQW3JgxZTAGi8zvvPziPy8Z4xAHU2oKVbUIen?= =?us-ascii?Q?xEHY4nnvbPFI5XGGrW6uK3QkpI1oFx+akz7fNyJ57UOEu96XplGSkMQz3lkG?= =?us-ascii?Q?7Gow/l9WzOFMAVf3o4rzEymslQrCW7uICZt8lbGweb6DKsKodXDdMgdM/q1F?= =?us-ascii?Q?8dJbTKpo7Qr60G1OZG9qTbbrS0L2ogH2MKlX8BVRAcwCpvm6FM/zjQKrh7VQ?= =?us-ascii?Q?nhB00oXiZYzMZX9DHg4TCe8/iH+5n0Ii13cctJr2R7LZOHMRiLWLAiwWIkMn?= =?us-ascii?Q?a7RzkYHgRkzEAbctpFw2iEXqwp4QdhBKV9b1Ah+oZmvRqVLoJDmUnQhXJ6xR?= =?us-ascii?Q?o1sx3dvDViiVjlh9FsBZMwF180P1138L6QAkb2PyYPoYXX8RbtM5gkI0qAwa?= =?us-ascii?Q?g2Qj2ydni/vyoG7Xs+1BpNddcRlm/VO1VRAKrM7PINST252+Ukn+LtmDKZUS?= =?us-ascii?Q?PCiJRubByXqXuHk8q2SSxFTG8MyUlSGnG0BVSkIYATcltWnYtInLdyutFB9B?= =?us-ascii?Q?C6O0tcnHHYIgubZbj5li3qWTsmG8azd8rgH++uf7b8415T16ouEBgyCCrRpP?= =?us-ascii?Q?pgofSiwzDZoNG045vcyA1M+C1W3GCrUOWaetz+WQJ673yqIc8Wg5I2diwCjZ?= =?us-ascii?Q?2ADLHds5WoYRi1MW6hrosrKUG7iy/jPFgOITc31+2s1bq5p0zIYU6QI5Sod4?= =?us-ascii?Q?SYBfGR4nlqaeUB8WSC2eYp+oiKtzkpubxNM4o6y04DqTwaoNzR3ITTLFOHpG?= =?us-ascii?Q?2ohHd9oD1IrXdmOeg5Z83Hm+0fifk7BsB7kfK3T2wk2J0cdzNDSRADF86UBy?= =?us-ascii?Q?+/HbpbrP8LNuGTquaQsJofCcqeb5ueYl6I7l7DsVln1YqxhVzMpdyDeWaLib?= =?us-ascii?Q?qjuANF3KMg/GJV/iDWgZuEUtQxQw552XmEHeCPFuEsSl8vhOtr/BzpvpJYpD?= =?us-ascii?Q?SiJ5bT39BKjrvOcYFYbr1rFjEpbxXDu6XnA94ikCTG8=3D?= X-OriginatorOrg: oss.nxp.com X-MS-Exchange-CrossTenant-AuthSource: AM4PR0401MB2401.eurprd04.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Internal X-MS-Exchange-CrossTenant-OriginalArrivalTime: 10 Dec 2020 08:48:56.2672 (UTC) X-MS-Exchange-CrossTenant-FromEntityHeader: Hosted X-MS-Exchange-CrossTenant-Id: 686ea1d3-bc2b-4c6f-a92c-d99c5c301635 X-MS-Exchange-CrossTenant-Network-Message-Id: e0a64c41-ac46-4939-a8dc-08d89ce86df4 X-MS-Exchange-CrossTenant-MailboxType: HOSTED X-MS-Exchange-CrossTenant-UserPrincipalName: 346Ix222MEhXO1QB1XFxH+Olg1lV9z/4PtHi7s7Hm/fSEqVveXFh1vmdF2lHOT3L9WH8WbP02IoTCgvZWYdOAv532xdd3Abnx721kYlNFgQ= X-MS-Exchange-Transport-CrossTenantHeadersStamped: AM0PR04MB5635 Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org From: Franck LENORMAND The SNVS can trigger interruption when detecting a security violation. This patch adds the definition of the resource. Signed-off-by: Franck LENORMAND --- include/dt-bindings/firmware/imx/rsrc.h | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/include/dt-bindings/firmware/imx/rsrc.h b/include/dt-bindings/firmware/imx/rsrc.h index 54278d5..fe5f25f 100644 --- a/include/dt-bindings/firmware/imx/rsrc.h +++ b/include/dt-bindings/firmware/imx/rsrc.h @@ -1,7 +1,7 @@ /* SPDX-License-Identifier: GPL-2.0+ */ /* * Copyright (C) 2016 Freescale Semiconductor, Inc. - * Copyright 2017-2018 NXP + * Copyright 2017-2018, 2020 NXP */ #ifndef __DT_BINDINGS_RSCRC_IMX_H @@ -50,6 +50,7 @@ #define IMX_SC_R_DC_1_BLIT2 38 #define IMX_SC_R_DC_1_BLIT_OUT 39 #define IMX_SC_R_DC_1_WARP 42 +#define IMX_SC_R_SECVIO 44 #define IMX_SC_R_DC_1_VIDEO0 45 #define IMX_SC_R_DC_1_VIDEO1 46 #define IMX_SC_R_DC_1_FRAC0 47 -- 2.7.4