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[178.255.168.35]) by smtp.gmail.com with ESMTPSA id f11sm5148560edy.59.2020.12.10.06.03.23 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Thu, 10 Dec 2020 06:03:23 -0800 (PST) Subject: Re: linux-next: manual merge of the tip tree with the microblaze tree To: Stephen Rothwell , Thomas Gleixner , Ingo Molnar , "H. Peter Anvin" , Peter Zijlstra Cc: Linux Kernel Mailing List , Linux Next Mailing List References: <20201210155808.717a7257@canb.auug.org.au> From: Michal Simek Message-ID: <1848f245-2a64-0aec-58db-b575de29debc@monstr.eu> Date: Thu, 10 Dec 2020 15:03:23 +0100 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:78.0) Gecko/20100101 Thunderbird/78.5.1 MIME-Version: 1.0 In-Reply-To: <20201210155808.717a7257@canb.auug.org.au> Content-Type: text/plain; charset=windows-1252 Content-Language: en-US Content-Transfer-Encoding: 7bit Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Hi Stephen, On 10. 12. 20 5:58, Stephen Rothwell wrote: > Hi all, > > Today's linux-next merge of the tip tree got conflicts in: > > arch/microblaze/Kconfig > arch/microblaze/mm/Makefile > > between commit: > > 05cdf457477d ("microblaze: Remove noMMU code") > > from the microblaze tree and commit: > > 7ac1b26b0a72 ("microblaze/mm/highmem: Switch to generic kmap atomic") > > from the tip tree. > > I fixed it up (see below) and can carry the fix as necessary. This > is now fixed as far as linux-next is concerned, but any non trivial > conflicts should be mentioned to your upstream maintainer when your tree > is submitted for merging. You may also want to consider cooperating > with the maintainer of the conflicting tree to minimise any particularly > complex conflicts. > Thanks for letting me know. I will mentioned it to Linus. Your resolution is correct. Thanks, Michal -- Michal Simek, Ing. (M.Eng), OpenPGP -> KeyID: FE3D1F91 w: www.monstr.eu p: +42-0-721842854 Maintainer of Linux kernel - Xilinx Microblaze Maintainer of Linux kernel - Xilinx Zynq ARM and ZynqMP ARM64 SoCs U-Boot custodian - Xilinx Microblaze/Zynq/ZynqMP/Versal SoCs