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Date:   Thu, 10 Dec 2020 15:16:10 +0100
From:   Andrew Lunn <andrew@lunn.ch>
To:     Steen Hegelund <steen.hegelund@microchip.com>
Cc:     Kishon Vijay Abraham I <kishon@ti.com>,
        Vinod Koul <vkoul@kernel.org>,
        linux-arm-kernel@lists.infradead.org,
        Alexandre Belloni <alexandre.belloni@bootlin.com>,
        Lars Povlsen <lars.povlsen@microchip.com>,
        Bjarni Jonasson <bjarni.jonasson@microchip.com>,
        Microchip UNG Driver List <UNGLinuxDriver@microchip.com>,
        netdev@vger.kernel.org, linux-kernel@vger.kernel.org
Subject: Re: [PATCH v9 3/4] phy: Add Sparx5 ethernet serdes PHY driver
Message-ID: <20201210141610.GG2638572@lunn.ch>
References: <20201207121345.3818234-1-steen.hegelund@microchip.com>
 <20201207121345.3818234-4-steen.hegelund@microchip.com>
 <20201210021134.GD2638572@lunn.ch>
 <20201210125706.saub7c2rarifhbx4@mchp-dev-shegelun>
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> > So why are returning link up information?
> 
> Yes that was a bit of a hijacking of the function.  I will remove that.
> I also removed the dependency on this behaviour in the client driver in the
> meantime.
> 
> I think a status function on the generic phy would be useful, but I will
> take that as separate issue.

In this context of an Ethernet SERDES, do you actually need it? You
would normally look at the PCS link status to determine if the link is
up.  But it is useful debug information. If the PCS is down, but the
PHY indicates up, you can guess you have a protocol misconfiguration.

What exactly does link at this level mean? And thinking of the wider
uses of the PHY subsystem, what would link mean at this level for
SATA, PCIe, USB? Don't these all have some protocol level above
similar to Ethernet PCS which is the real determiner of link?

     Andrew