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Thu, 10 Dec 2020 17:11:11 +0000 From: Tom Lendacky To: kvm@vger.kernel.org, linux-kernel@vger.kernel.org, x86@kernel.org Cc: Paolo Bonzini , Jim Mattson , Joerg Roedel , Sean Christopherson , Vitaly Kuznetsov , Wanpeng Li , Borislav Petkov , Ingo Molnar , Thomas Gleixner , Brijesh Singh Subject: [PATCH v5 06/34] KVM: x86: Mark GPRs dirty when written Date: Thu, 10 Dec 2020 11:09:41 -0600 Message-Id: <7ca2a1cdb61456f2fe9c64193e34d601e395c133.1607620209.git.thomas.lendacky@amd.com> X-Mailer: git-send-email 2.28.0 In-Reply-To: References: Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit X-Originating-IP: [165.204.77.1] X-ClientProxiedBy: CH2PR10CA0027.namprd10.prod.outlook.com (2603:10b6:610:4c::37) To CY4PR12MB1352.namprd12.prod.outlook.com (2603:10b6:903:3a::13) MIME-Version: 1.0 X-MS-Exchange-MessageSentRepresentingType: 1 Received: from tlendack-t1.amd.com (165.204.77.1) by CH2PR10CA0027.namprd10.prod.outlook.com (2603:10b6:610:4c::37) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.3654.12 via Frontend Transport; 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X-MS-Exchange-AntiSpam-MessageData: =?us-ascii?Q?p12KSEZymiKGpklUtAZRnBhILFkOEBhJsRBUcr/nh+bm8y+y5333fpmuFdWi?= =?us-ascii?Q?/M0knM88+Fdcug/XRQtcTpB2n58/pozSL2fTjh6ODpgsOB7e6fdTtmP0eGm5?= =?us-ascii?Q?x0R25QOi2+ZWEVkuWt4wPbntClEEQ9X4bJdghMMt1IxNvcJWfj/lKmdeRtjR?= =?us-ascii?Q?JvrE7EEuZdT0FEjiAUIbSPSn9L0aINsPyCQDwub+JjarN+gwYL6CLOqfEHHD?= =?us-ascii?Q?JQvH8M/axgfCZjZxRZtE1TbKeTmzD1+Q88mus0c0sO1fDCwYiqgJI7oUtAov?= =?us-ascii?Q?KilntZCoPemwPHxBVLsToFCmT+xE2/5Gj/HYK2SUUbCK5M9csp16rUlNtQ+X?= =?us-ascii?Q?lIcSxxgCwNX+QlA3DNSRwgvf9Q/YljuJ6OYXmiay4UdYvotmpoJ2QAWD5olG?= =?us-ascii?Q?Mvpx/5eu08V4LfiZWtH0bxyVVrhObVjFwmDzN7dnOlI9mEqvUceFi6eOrzto?= =?us-ascii?Q?qdlY2ULTZvuRzyzzpzuC2t9NCsKKM0EhNtf5aODq8U6BKEZ1MuFzmj3tRteP?= =?us-ascii?Q?cShR1uqNy/97Aarxs0QSoCsMP5s15vEliaGD0EJ06k6s83K0FPYYYmrNKTc8?= =?us-ascii?Q?EOpfvnS+OAMbXLdSPC9BeFl4etSRzsgCgnLAql9V8CihoKXEiZTu1M42/eCp?= =?us-ascii?Q?vjM8213V6t1hopveJinWkagGgHfCQLUxN6eQs+IjkqupidaEIYuwoJWow/9d?= =?us-ascii?Q?53paWS9q+PBY2GTPyT2lYCCkClaitGEMlEPP4t0wK0jZwjfMNU7FF4EsYABx?= =?us-ascii?Q?IzeSzCgYtXUUcekC+1AMx2stLUvl1yWVIraNykS64eODADfZawuV5c710eZV?= =?us-ascii?Q?v5ckwWlixCGSzA/CQlznXV5whv6H90xZBucfCPBr6S2JVxJdKWJt/hEN4OM+?= =?us-ascii?Q?8Wy8l1Bp21sMmLpaTLXIP/caCJI85wei9jsFMcr9j2peG3ZKYlgxz/mcKzit?= =?us-ascii?Q?/GkKz/UbpOR8pCwiNjUfbNDTikwUUqXQ5hoqahUZbFiyIq8lBvFm47ii1HHb?= =?us-ascii?Q?Dwle?= X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-AuthSource: CY4PR12MB1352.namprd12.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Internal X-MS-Exchange-CrossTenant-OriginalArrivalTime: 10 Dec 2020 17:11:11.0453 (UTC) X-MS-Exchange-CrossTenant-FromEntityHeader: Hosted X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-Network-Message-Id: c7499dcb-f2dc-4b9c-17ce-08d89d2e97a9 X-MS-Exchange-CrossTenant-MailboxType: HOSTED X-MS-Exchange-CrossTenant-UserPrincipalName: HAxP/xSxuwLGn24+IsN4JSFX/oVnwLYp0QRRZuTihYk3lmB3tRig445BJKfMLm5PZdrDPMWZhSofwByCiZSwcQ== X-MS-Exchange-Transport-CrossTenantHeadersStamped: CY4PR1201MB0149 Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org From: Tom Lendacky When performing VMGEXIT processing for an SEV-ES guest, register values will be synced between KVM and the GHCB. Prepare for detecting when a GPR has been updated (marked dirty) in order to determine whether to sync the register to the GHCB. Signed-off-by: Tom Lendacky --- arch/x86/kvm/kvm_cache_regs.h | 51 ++++++++++++++++++----------------- 1 file changed, 26 insertions(+), 25 deletions(-) diff --git a/arch/x86/kvm/kvm_cache_regs.h b/arch/x86/kvm/kvm_cache_regs.h index a889563ad02d..f15bc16de07c 100644 --- a/arch/x86/kvm/kvm_cache_regs.h +++ b/arch/x86/kvm/kvm_cache_regs.h @@ -9,6 +9,31 @@ (X86_CR4_PVI | X86_CR4_DE | X86_CR4_PCE | X86_CR4_OSFXSR \ | X86_CR4_OSXMMEXCPT | X86_CR4_PGE | X86_CR4_TSD | X86_CR4_FSGSBASE) +static inline bool kvm_register_is_available(struct kvm_vcpu *vcpu, + enum kvm_reg reg) +{ + return test_bit(reg, (unsigned long *)&vcpu->arch.regs_avail); +} + +static inline bool kvm_register_is_dirty(struct kvm_vcpu *vcpu, + enum kvm_reg reg) +{ + return test_bit(reg, (unsigned long *)&vcpu->arch.regs_dirty); +} + +static inline void kvm_register_mark_available(struct kvm_vcpu *vcpu, + enum kvm_reg reg) +{ + __set_bit(reg, (unsigned long *)&vcpu->arch.regs_avail); +} + +static inline void kvm_register_mark_dirty(struct kvm_vcpu *vcpu, + enum kvm_reg reg) +{ + __set_bit(reg, (unsigned long *)&vcpu->arch.regs_avail); + __set_bit(reg, (unsigned long *)&vcpu->arch.regs_dirty); +} + #define BUILD_KVM_GPR_ACCESSORS(lname, uname) \ static __always_inline unsigned long kvm_##lname##_read(struct kvm_vcpu *vcpu)\ { \ @@ -18,6 +43,7 @@ static __always_inline void kvm_##lname##_write(struct kvm_vcpu *vcpu, \ unsigned long val) \ { \ vcpu->arch.regs[VCPU_REGS_##uname] = val; \ + kvm_register_mark_dirty(vcpu, VCPU_REGS_##uname); \ } BUILD_KVM_GPR_ACCESSORS(rax, RAX) BUILD_KVM_GPR_ACCESSORS(rbx, RBX) @@ -37,31 +63,6 @@ BUILD_KVM_GPR_ACCESSORS(r14, R14) BUILD_KVM_GPR_ACCESSORS(r15, R15) #endif -static inline bool kvm_register_is_available(struct kvm_vcpu *vcpu, - enum kvm_reg reg) -{ - return test_bit(reg, (unsigned long *)&vcpu->arch.regs_avail); -} - -static inline bool kvm_register_is_dirty(struct kvm_vcpu *vcpu, - enum kvm_reg reg) -{ - return test_bit(reg, (unsigned long *)&vcpu->arch.regs_dirty); -} - -static inline void kvm_register_mark_available(struct kvm_vcpu *vcpu, - enum kvm_reg reg) -{ - __set_bit(reg, (unsigned long *)&vcpu->arch.regs_avail); -} - -static inline void kvm_register_mark_dirty(struct kvm_vcpu *vcpu, - enum kvm_reg reg) -{ - __set_bit(reg, (unsigned long *)&vcpu->arch.regs_avail); - __set_bit(reg, (unsigned long *)&vcpu->arch.regs_dirty); -} - static inline unsigned long kvm_register_read(struct kvm_vcpu *vcpu, int reg) { if (WARN_ON_ONCE((unsigned int)reg >= NR_VCPU_REGS)) -- 2.28.0