Received: by 2002:a05:6a10:f347:0:0:0:0 with SMTP id d7csp438169pxu; Fri, 11 Dec 2020 06:04:52 -0800 (PST) X-Google-Smtp-Source: ABdhPJxb787mSDN6OSR1ukFRXjEpVSzQlRMc3uBZAa6N+eNGDkDVJSNZrVQi3Rc6j1eI9red/ayQ X-Received: by 2002:a50:e791:: with SMTP id b17mr11862209edn.388.1607695492306; Fri, 11 Dec 2020 06:04:52 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1607695492; cv=none; d=google.com; s=arc-20160816; b=A1CgcXVaPgPFMS01EIprAwL+faTCtIopg3Xcf6VSo4buZTFKt2pbdqa9JUCrvF49Ij Cti8J1jKPI/SGN+pw5cqb5AWQEO5GRpKFA975m8wO/esUW9LawxHrCq8XKVwdxmx9PhM SUAAA7qT4koU34kdbQ+2/DjsZJoGuZW+2Fy4EKRGWSK6hbBwSxQvigpxE8OOnEl0pZXW V4TefNViND/tOpMjPoaLgKWL/vb71hjzIvvnOKQzEA3sVtkfgyvin86WsnVzm87hpN4l 3Da6Snrzn+m+HqlDdOqjqbXENvxU0X9byINrENVuTY7aLA8nkBAq3ghnqCGfUSaEYPQj wlaQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:mime-version:message-id:date:subject:to:from; bh=XYinmJ3ejtAN6ViBJ2M6sPSeRQ9mZLwaCADOk7gDico=; b=beeviB9EeODQZK0dsHeJDKPF7KOXdTBEV8I9oMb0QpyckDdUjYRZvvTQkwQaGmdQfa cSaEjt4Ed8LMqVGmlJKFUUlzLc+ep1AVrH/R2yyv6fLTnhcTfv3ajIxcUZP7xYWAkOiE sySco+A7GhDfDQWzqS02II0+AGRd/ZkiyewOwgZOtuKJzXG9w2Uz4xwNzqmu9l17WSUn iOiykDXJOdPh2qY+EDk1XoRZoOgquHvoskQ2p8VXwSENyo4f5sqjum3CPVl6gU3f8zQe hqfsf5ciFTo6nAmN7CxDJ5iz2gd0KRwM4G+o5nT401Svi2EhVVmhsSjilLl3RGIkPjw+ OVKA== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [23.128.96.18]) by mx.google.com with ESMTP id o31si4887896edd.172.2020.12.11.06.04.28; Fri, 11 Dec 2020 06:04:52 -0800 (PST) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) client-ip=23.128.96.18; Authentication-Results: mx.google.com; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S2405856AbgLKMAG (ORCPT + 99 others); Fri, 11 Dec 2020 07:00:06 -0500 Received: from szxga06-in.huawei.com ([45.249.212.32]:9430 "EHLO szxga06-in.huawei.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726015AbgLKL7y (ORCPT ); Fri, 11 Dec 2020 06:59:54 -0500 Received: from DGGEMS410-HUB.china.huawei.com (unknown [172.30.72.59]) by szxga06-in.huawei.com (SkyGuard) with ESMTP id 4Csq7N6nK7zhqV6; Fri, 11 Dec 2020 19:58:40 +0800 (CST) Received: from huawei.com (10.151.151.249) by DGGEMS410-HUB.china.huawei.com (10.3.19.210) with Microsoft SMTP Server id 14.3.487.0; Fri, 11 Dec 2020 19:58:59 +0800 From: Dongjiu Geng To: , , , , , , , , , , Subject: [PATCH RESEND v6 0/4] Enable Hi3559A SOC clock and HiSilicon Hiedma Controller Date: Sat, 12 Dec 2020 13:11:11 +0000 Message-ID: <20201212131115.569-1-gengdongjiu@huawei.com> X-Mailer: git-send-email 2.17.1 MIME-Version: 1.0 Content-Type: text/plain X-Originating-IP: [10.151.151.249] X-CFilter-Loop: Reflected Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org v5->v6: 1. Drop #size-cells and #address-cell in the hisilicon,hi3559av100-clock.yaml 2. Add discription for #reset-cells in the hisilicon,hi3559av100-clock.yaml 3. Remove #clock-cells in hisilicon,hiedmacv310.yaml 4. Merge property misc_ctrl_base and misc_regmap together for hiedmacv310 driver v4->v5: 1. change the patch author mail name v3->v4: 1. fix the 'make dt_binding_check' issues. 2. Combine the 'Enable HiSilicon Hiedma Controller' series patches to this series. 3. fix the 'make dt_binding_check' issues in 'Enable HiSilicon Hiedma Controller' patchset v2->v3: 1. change dt-bindings documents from txt to yaml format. 2. Add SHUB clock to access the devices of m7 Dongjiu Geng (4): dt-bindings: Document the hi3559a clock bindings clk: hisilicon: Add clock driver for hi3559A SoC dt: bindings: dma: Add DT bindings for HiSilicon Hiedma Controller dmaengine: dma: Add Hiedma Controller v310 Device Driver .../clock/hisilicon,hi3559av100-clock.yaml | 59 + .../bindings/dma/hisilicon,hiedmacv310.yaml | 94 ++ drivers/clk/hisilicon/Kconfig | 7 + drivers/clk/hisilicon/Makefile | 1 + drivers/clk/hisilicon/clk-hi3559a.c | 865 ++++++++++ drivers/dma/Kconfig | 14 + drivers/dma/Makefile | 1 + drivers/dma/hiedmacv310.c | 1442 +++++++++++++++++ drivers/dma/hiedmacv310.h | 136 ++ include/dt-bindings/clock/hi3559av100-clock.h | 165 ++ 10 files changed, 2784 insertions(+) create mode 100644 Documentation/devicetree/bindings/clock/hisilicon,hi3559av100-clock.yaml create mode 100644 Documentation/devicetree/bindings/dma/hisilicon,hiedmacv310.yaml create mode 100644 drivers/clk/hisilicon/clk-hi3559a.c create mode 100644 drivers/dma/hiedmacv310.c create mode 100644 drivers/dma/hiedmacv310.h create mode 100644 include/dt-bindings/clock/hi3559av100-clock.h -- 2.17.1