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Fri, 11 Dec 2020 08:45:13 +0800 Message-ID: <1607647514.12750.5.camel@mhfsdcap03> Subject: Re: [PATCH v8, 5/6] drm/mediatek: add RDMA fifo size error handle From: Yongqiang Niu Reply-To: Yongqiang Niu To: Chun-Kuang Hu CC: CK Hu , Philipp Zabel , "Rob Herring" , Matthias Brugger , Mark Rutland , DTML , David Airlie , linux-kernel , DRI Development , "moderated list:ARM/Mediatek SoC support" , Daniel Vetter , Linux ARM Date: Fri, 11 Dec 2020 08:45:14 +0800 In-Reply-To: References: <1607591262-21736-1-git-send-email-yongqiang.niu@mediatek.com> <1607591262-21736-6-git-send-email-yongqiang.niu@mediatek.com> Content-Type: text/plain; charset="UTF-8" X-Mailer: Evolution 3.10.4-0ubuntu2 MIME-Version: 1.0 X-MTK: N Content-Transfer-Encoding: base64 Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org T24gVGh1LCAyMDIwLTEyLTEwIGF0IDIzOjUwICswODAwLCBDaHVuLUt1YW5nIEh1IHdyb3RlOg0K PiBIaSwgWW9uZ3FpYW5nOg0KPiANCj4gWW9uZ3FpYW5nIE5pdSA8eW9uZ3FpYW5nLm5pdUBtZWRp YXRlay5jb20+IOaWvCAyMDIw5bm0MTLmnIgxMOaXpSDpgLHlm5sg5LiL5Y2INTowOOWvq+mBk++8 mg0KPiA+DQo+ID4gVGhpcyBwYXRjaCBhZGQgUkRNQSBmaWZvIHNpemUgZXJyb3IgaGFuZGxlDQo+ ID4gcmRtYSBmaWZvIHNpemUgd2lsbCBub3QgYWx3YXlzIGJpZ2dlciB0aGFuIHRoZSBjYWxjdWxh dGVkIHRocmVzaG9sZA0KPiA+IGlmIHRoYXQgY2FzZSBoYXBwZW5lZCwgd2UgbmVlZCBzZXQgZmlm byBzaXplIGFzIHRoZSB0aHJlc2hvbGQNCj4gPg0KPiA+IFNpZ25lZC1vZmYtYnk6IFlvbmdxaWFu ZyBOaXUgPHlvbmdxaWFuZy5uaXVAbWVkaWF0ZWsuY29tPg0KPiA+IC0tLQ0KPiA+ICBkcml2ZXJz L2dwdS9kcm0vbWVkaWF0ZWsvbXRrX2Rpc3BfcmRtYS5jIHwgNCArKysrDQo+ID4gIDEgZmlsZSBj aGFuZ2VkLCA0IGluc2VydGlvbnMoKykNCj4gPg0KPiA+IGRpZmYgLS1naXQgYS9kcml2ZXJzL2dw dS9kcm0vbWVkaWF0ZWsvbXRrX2Rpc3BfcmRtYS5jIGIvZHJpdmVycy9ncHUvZHJtL21lZGlhdGVr L210a19kaXNwX3JkbWEuYw0KPiA+IGluZGV4IDc5NGFjYzUuLjA1MDgzOTIgMTAwNjQ0DQo+ID4g LS0tIGEvZHJpdmVycy9ncHUvZHJtL21lZGlhdGVrL210a19kaXNwX3JkbWEuYw0KPiA+ICsrKyBi L2RyaXZlcnMvZ3B1L2RybS9tZWRpYXRlay9tdGtfZGlzcF9yZG1hLmMNCj4gPiBAQCAtMTUxLDYg KzE1MSwxMCBAQCBzdGF0aWMgdm9pZCBtdGtfcmRtYV9jb25maWcoc3RydWN0IG10a19kZHBfY29t cCAqY29tcCwgdW5zaWduZWQgaW50IHdpZHRoLA0KPiA+ICAgICAgICAgICogYWNjb3VudCBmb3Ig YmxhbmtpbmcsIGFuZCB3aXRoIGEgcGl4ZWwgZGVwdGggb2YgNCBieXRlczoNCj4gPiAgICAgICAg ICAqLw0KPiA+ICAgICAgICAgdGhyZXNob2xkID0gd2lkdGggKiBoZWlnaHQgKiB2cmVmcmVzaCAq IDQgKiA3IC8gMTAwMDAwMDsNCj4gPiArDQo+ID4gKyAgICAgICBpZiAodGhyZXNob2xkID4gcmRt YV9maWZvX3NpemUpDQo+ID4gKyAgICAgICAgICAgICAgIHRocmVzaG9sZCA9IHJkbWFfZmlmb19z aXplOw0KPiANCj4gSWYgdGhlIGZvcm11bGEgaXMgbm90IGNvcnJlY3QsIHlvdSBzaG91bGQgZml4 IHRoZSBmb3JtdWxhIG5vdCB3b3JrIGFyb3VuZC4NCj4gDQo+IFJlZ2FyZHMsDQo+IENodW4tS3Vh bmcuDQoNCmhvdyBhYm91dCB0aGlzOg0KdGhyZXNob2xkID0gbWF4KHdpZHRoICogaGVpZ2h0ICog dnJlZnJlc2ggKiA0ICogNyAvIDEwMDAwMDAsDQpyZG1hX2ZpZm9fc2l6ZSk7DQo+IA0KPiA+ICsN Cj4gPiAgICAgICAgIHJlZyA9IFJETUFfRklGT19VTkRFUkZMT1dfRU4gfA0KPiA+ICAgICAgICAg ICAgICAgUkRNQV9GSUZPX1BTRVVET19TSVpFKHJkbWFfZmlmb19zaXplKSB8DQo+ID4gICAgICAg ICAgICAgICBSRE1BX09VVFBVVF9WQUxJRF9GSUZPX1RIUkVTSE9MRCh0aHJlc2hvbGQpOw0KPiA+ IC0tDQo+ID4gMS44LjEuMS5kaXJ0eQ0KPiA+IF9fX19fX19fX19fX19fX19fX19fX19fX19fX19f X19fX19fX19fX19fX19fX19fDQo+ID4gTGludXgtbWVkaWF0ZWsgbWFpbGluZyBsaXN0DQo+ID4g TGludXgtbWVkaWF0ZWtAbGlzdHMuaW5mcmFkZWFkLm9yZw0KPiA+IGh0dHA6Ly9saXN0cy5pbmZy YWRlYWQub3JnL21haWxtYW4vbGlzdGluZm8vbGludXgtbWVkaWF0ZWsNCg0K