Received: by 2002:a05:6a10:f347:0:0:0:0 with SMTP id d7csp1187846pxu; Sat, 12 Dec 2020 05:02:51 -0800 (PST) X-Google-Smtp-Source: ABdhPJw6yN3jYnCrJy+fSKA7QMNO8WTXoeZza6PPN6+TnpXPbid6etiejO53nKnyyxEXIQzesT2Z X-Received: by 2002:a17:907:c10:: with SMTP id ga16mr14983372ejc.43.1607778171387; Sat, 12 Dec 2020 05:02:51 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1607778171; cv=none; d=google.com; s=arc-20160816; b=jyZ8HrevhzYPH/9U5h7Q+ywUil0DlVU97CZxUQDB3xA1YW+kaRMDQ+2wbIgFit4w8D xn3CdVX4/WMGXfxNgRmC71c1NTMrbLTeEHbTqvYMpjgi8r2G0mvDGoe4y3oDHJayfu1Z amAVZVGxWRjbqTmH2Gff6/PGE+Vi0C7ekmuwu3en5UUWOHLF1hidz1VQIH2NtJLyT3j8 nUN4qDidZpE+pshAGzsWUV8634EgNC3ACcN8RGOcXNm2m6+qRhEHJPzyvh/B1p6OTe8q jl/0h1DXxiqo53HhbOeP/f/ojex5IGOsGJCrVAyLaMDNvZDCQ/fNFvT4F/kQrROqX/0o SfJw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:mime-version:message-id:date:subject:to:from; bh=tvPPvoz8FzdQrmLY1zK3auV2E04l9PlT+VWx29uFeB8=; b=AGcPkfdf8vyonMvrLCuMAeacPKDzEMhe/y0p4eWwdMxDWmVWMH1TYrdRUYue2Tcys2 ioP5t6ALWqiIlxoStc+H185/8LbsgX2gW7hJ0tiZ8eGvfV9A/+YbnZPkgfPeEPLg9BY0 agsBnSnqNIt3ZUa9Z/1XISgkg34+RamESzW6VsJy7Vskz+1P5A9eWP6tbfaLXy7xHSiX BgJgPh9skw5XscM+EIMilUjbCsFe95CDnfq9VUUxT8hE6cjkB6xE/fZ1C+qHAmtz19CE ZHXk0f90CRMk0uWgYkdq23LFgyPgJtcr0/AjFPRGVt/yyapsrw+6xd756SquMCTAYjIb WX+A== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [23.128.96.18]) by mx.google.com with ESMTP id v14si6123262ejb.322.2020.12.12.05.02.27; Sat, 12 Dec 2020 05:02:51 -0800 (PST) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) client-ip=23.128.96.18; Authentication-Results: mx.google.com; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S2403796AbgLKLyn (ORCPT + 99 others); Fri, 11 Dec 2020 06:54:43 -0500 Received: from szxga05-in.huawei.com ([45.249.212.191]:9519 "EHLO szxga05-in.huawei.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S2392205AbgLKLyh (ORCPT ); Fri, 11 Dec 2020 06:54:37 -0500 Received: from DGGEMS408-HUB.china.huawei.com (unknown [172.30.72.60]) by szxga05-in.huawei.com (SkyGuard) with ESMTP id 4Csq1C0Bwdzhq2y; Fri, 11 Dec 2020 19:53:19 +0800 (CST) Received: from huawei.com (10.151.151.249) by DGGEMS408-HUB.china.huawei.com (10.3.19.208) with Microsoft SMTP Server id 14.3.487.0; Fri, 11 Dec 2020 19:53:42 +0800 From: Dongjiu Geng To: , , , , , , , , , , Subject: [PATCH v6 0/4] Enable Hi3559A SOC clock and HiSilicon Hiedma Controller Date: Sat, 12 Dec 2020 13:05:54 +0000 Message-ID: <20201212130558.49086-1-gengdongjiu@huawei.com> X-Mailer: git-send-email 2.17.1 MIME-Version: 1.0 Content-Type: text/plain X-Originating-IP: [10.151.151.249] X-CFilter-Loop: Reflected Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org From: g00384164 v5->v6: 1. Drop #size-cells and #address-cell in the hisilicon,hi3559av100-clock.yaml 2. Add discription for #reset-cells in the hisilicon,hi3559av100-clock.yaml 3. Remove #clock-cells in hisilicon,hiedmacv310.yaml 4. Merge property misc_ctrl_base and misc_regmap together for hiedmacv310 driver v4->v5: 1. change the patch author mail name v3->v4: 1. fix the 'make dt_binding_check' issues. 2. Combine the 'Enable HiSilicon Hiedma Controller' series patches to this series. 3. fix the 'make dt_binding_check' issues in 'Enable HiSilicon Hiedma Controller' patchset v2->v3: 1. change dt-bindings documents from txt to yaml format. 2. Add SHUB clock to access the devices of m7 Dongjiu Geng (4): dt-bindings: Document the hi3559a clock bindings clk: hisilicon: Add clock driver for hi3559A SoC dt: bindings: dma: Add DT bindings for HiSilicon Hiedma Controller dmaengine: dma: Add Hiedma Controller v310 Device Driver .../clock/hisilicon,hi3559av100-clock.yaml | 59 + .../bindings/dma/hisilicon,hiedmacv310.yaml | 94 ++ drivers/clk/hisilicon/Kconfig | 7 + drivers/clk/hisilicon/Makefile | 1 + drivers/clk/hisilicon/clk-hi3559a.c | 865 ++++++++++ drivers/dma/Kconfig | 14 + drivers/dma/Makefile | 1 + drivers/dma/hiedmacv310.c | 1442 +++++++++++++++++ drivers/dma/hiedmacv310.h | 136 ++ include/dt-bindings/clock/hi3559av100-clock.h | 165 ++ 10 files changed, 2784 insertions(+) create mode 100644 Documentation/devicetree/bindings/clock/hisilicon,hi3559av100-clock.yaml create mode 100644 Documentation/devicetree/bindings/dma/hisilicon,hiedmacv310.yaml create mode 100644 drivers/clk/hisilicon/clk-hi3559a.c create mode 100644 drivers/dma/hiedmacv310.c create mode 100644 drivers/dma/hiedmacv310.h create mode 100644 include/dt-bindings/clock/hi3559av100-clock.h -- 2.17.1