Received: by 2002:a05:6a10:f347:0:0:0:0 with SMTP id d7csp1752937pxu;
        Sun, 13 Dec 2020 02:18:25 -0800 (PST)
X-Google-Smtp-Source: ABdhPJxyxqvA6oqJ2IeVFeOcxI5OT+ewK9gmzwOU6B6LTsyXJm1ffh0TdfSgH8Y+VuOSJYLkEF2M
X-Received: by 2002:a17:906:9acc:: with SMTP id ah12mr17693586ejc.386.1607854704841;
        Sun, 13 Dec 2020 02:18:24 -0800 (PST)
ARC-Seal: i=1; a=rsa-sha256; t=1607854704; cv=none;
        d=google.com; s=arc-20160816;
        b=VpLBWs9X1c6DWEHlgs4nsBVofU7ax3ozlnMHjuZgvjpEG/IYTkokHYIcmgJ7XhMJNt
         XlCDUqnLSiQgZmjBqzAQWXPll1SFQM7P6/ZHC52ejhn5xZslOEPS+4mG8OI6VOfC4E9L
         SWrNkBbRYfhdSjF8b74xGI+ng3inysmpGRpyW0LhS7+eRtR2QoV0PlXEDsnuBsVYLyij
         iDfso3ZMbFlOkI7NthiavvCY+7zXmmjLerbHIY3uEAeEmrgUIaR+h+CfGN9RBvWsXi6g
         sY9+5Bl/fTq5KUslusk++wOXAq9WpFpgzj+cICxghgdQOc2w0SCqfNB+dzRizsiZDs8G
         7sFg==
ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816;
        h=list-id:precedence:dkim-signature:mime-version:references
         :in-reply-to:message-id:date:subject:cc:to:from;
        bh=OdeajKJ0j5APS54go9aWji3Lx0upX2LRZePHgYW8yjo=;
        b=tR+4XoQ8YY+p0HoamLGaF+pMaI+vA4iReXXA+G7bWGYkW0lKTZeXYJBKFKU+wZBIf6
         1MpOQsdOrqXtvmYk/2QrpCyDpONQSUOnbTuAkrpDd9VGas+o7ztnQle6+XlImZIHfNXv
         Sp8SMvtMRZXUNS2MOUvMZnsGZBA0HaHspGnJ/2latN1RrGgGdOy0MMpofnXPgvgNmS/v
         ySGF/gKblLguIpn4lepui//74JhKFa+fESvrYsidsQ7OHCtbVSty6jq8G6rePNSNh4el
         j5EkUDMkNFpRJPG7lTmcIGbPW2SQI983Zc0Cf2+uvIKB1QUCrEZukbPFh2sPZ7wPU79h
         ogHg==
ARC-Authentication-Results: i=1; mx.google.com;
       dkim=pass header.i=@nvidia.com header.s=n1 header.b=Xlp1CCnd;
       spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org;
       dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=nvidia.com
Return-Path: <linux-kernel-owner@vger.kernel.org>
Received: from vger.kernel.org (vger.kernel.org. [23.128.96.18])
        by mx.google.com with ESMTP id j22si8102712edh.496.2020.12.13.02.17.48;
        Sun, 13 Dec 2020 02:18:24 -0800 (PST)
Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) client-ip=23.128.96.18;
Authentication-Results: mx.google.com;
       dkim=pass header.i=@nvidia.com header.s=n1 header.b=Xlp1CCnd;
       spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org;
       dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=nvidia.com
Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand
        id S2388466AbgLKVRO (ORCPT <rfc822;pokegacc141@gmail.com>
        + 99 others); Fri, 11 Dec 2020 16:17:14 -0500
Received: from hqnvemgate24.nvidia.com ([216.228.121.143]:6329 "EHLO
        hqnvemgate24.nvidia.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org
        with ESMTP id S2390488AbgLKVQt (ORCPT
        <rfc822;linux-kernel@vger.kernel.org>);
        Fri, 11 Dec 2020 16:16:49 -0500
Received: from hqmail.nvidia.com (Not Verified[216.228.121.13]) by hqnvemgate24.nvidia.com (using TLS: TLSv1.2, AES256-SHA)
        id <B5fd3e1980000>; Fri, 11 Dec 2020 13:16:08 -0800
Received: from HQMAIL107.nvidia.com (172.20.187.13) by HQMAIL101.nvidia.com
 (172.20.187.10) with Microsoft SMTP Server (TLS) id 15.0.1473.3; Fri, 11 Dec
 2020 21:16:07 +0000
Received: from skomatineni-linux.nvidia.com (172.20.145.6) by mail.nvidia.com
 (172.20.187.13) with Microsoft SMTP Server id 15.0.1473.3 via Frontend
 Transport; Fri, 11 Dec 2020 21:16:07 +0000
From:   Sowjanya Komatineni <skomatineni@nvidia.com>
To:     <thierry.reding@gmail.com>, <jonathanh@nvidia.com>,
        <broonie@kernel.org>, <robh+dt@kernel.org>, <lukas@wunner.de>
CC:     <skomatineni@nvidia.com>, <bbrezillon@kernel.org>,
        <p.yadav@ti.com>, <tudor.ambarus@microchip.com>,
        <linux-spi@vger.kernel.org>, <linux-tegra@vger.kernel.org>,
        <linux-kernel@vger.kernel.org>, <devicetree@vger.kernel.org>
Subject: [PATCH v3 1/9] dt-bindings: clock: tegra: Add clock ID TEGRA210_CLK_QSPI_PM
Date:   Fri, 11 Dec 2020 13:15:55 -0800
Message-ID: <1607721363-8879-2-git-send-email-skomatineni@nvidia.com>
X-Mailer: git-send-email 2.7.4
In-Reply-To: <1607721363-8879-1-git-send-email-skomatineni@nvidia.com>
References: <1607721363-8879-1-git-send-email-skomatineni@nvidia.com>
X-NVConfidentiality: public
MIME-Version: 1.0
Content-Type: text/plain
DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=nvidia.com; s=n1;
        t=1607721368; bh=OdeajKJ0j5APS54go9aWji3Lx0upX2LRZePHgYW8yjo=;
        h=From:To:CC:Subject:Date:Message-ID:X-Mailer:In-Reply-To:
         References:X-NVConfidentiality:MIME-Version:Content-Type;
        b=Xlp1CCndJzOsTCWlN01H3OnNbbWNBfthxsyOG5K6N52EHqW//6FkihnooyqFoLfb2
         nT3bsn5uSPDO1Tjh6qDXQ6XoUkRXAy7kFNWFHCm19Xt4perQO5ZZXuz3NB68D0eG5S
         vRcH2dfa6CzIbMQWuQt9hxKlnHW9T9Ljx2uzrBFvjU7+9ti7lHS0SapZHCc6DaegKw
         CiaGQmBXqDbfux+YmgzGuO3V5q1k67AXTrtfa9p7a7jZQRYPbpUby6gdT/E7lYmVVk
         FiJKGvjdOq+vLOn3YyOJ0FPt5v9VLKYt7yTCzjIny31msaXls/O32lNFtejS8kDC2R
         gFjSI18aBmgQQ==
Precedence: bulk
List-ID: <linux-kernel.vger.kernel.org>
X-Mailing-List: linux-kernel@vger.kernel.org

Tegra210 QSPI clock output has divider DIV2_SEL which will be enabled
when using DDR interface mode.

This patch adds clock ID for this to dt-binding.

Signed-off-by: Sowjanya Komatineni <skomatineni@nvidia.com>
---
 include/dt-bindings/clock/tegra210-car.h | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/include/dt-bindings/clock/tegra210-car.h b/include/dt-bindings/clock/tegra210-car.h
index ab8b8a7..9cfcc3b 100644
--- a/include/dt-bindings/clock/tegra210-car.h
+++ b/include/dt-bindings/clock/tegra210-car.h
@@ -307,7 +307,7 @@
 #define TEGRA210_CLK_AUDIO4 275
 #define TEGRA210_CLK_SPDIF 276
 /* 277 */
-/* 278 */
+#define TEGRA210_CLK_QSPI_PM 278
 /* 279 */
 /* 280 */
 #define TEGRA210_CLK_SOR0_LVDS 281 /* deprecated */
-- 
2.7.4