Received: by 2002:a05:6a10:f347:0:0:0:0 with SMTP id d7csp1850738pxu; Sun, 13 Dec 2020 05:30:43 -0800 (PST) X-Google-Smtp-Source: ABdhPJz5LPHrydPTNwxa19CYfJ6mJpwvSLhea7M0ApWQ8aDQark5G1ScKorkBFxAe6cX1f+d1KSi X-Received: by 2002:a17:906:27d1:: with SMTP id k17mr19367714ejc.325.1607866243524; Sun, 13 Dec 2020 05:30:43 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1607866243; cv=none; d=google.com; s=arc-20160816; b=L4T4+NJnQB2GDiK/qNYqsvs2h4PRJDSKjrP4vBHSenMRS8lgMNcpM8KYaiiU85tlHd DbNbhMVkyE2SiIbWPH7RuE8luYXlNmn1Fu+Y/5pVOJscruSNrZx0RNVcuOaJC5hPaa1c 3psiqBSlXwL9/WV6lKJ2oeV+DPuylLHHZy6jjYQx036vpstEDQ42tntCnmaQFeLKIgW7 FU8ytr9ZzQW6XFdqeiPa8npk3w/7P3NstW1wDEq20LS/Mqr9q3s9Cw2LBEZQp2AGFFUX 1+o3FsK9zQ9lgt50TlBVTf5bzG8Oqszjx8s4CEOnT64QXuac3f9Zq8M5PAvFCgc9m6Yg B6VA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:cc:to:subject:message-id:date:from:in-reply-to :references:mime-version:dkim-signature; bh=B+v8QnAZfVmqdM00Egj83ptDN3hTPJz74BI1U+QyDFM=; b=COd4jFVwsJVRWzOjXjTN4Fw+Q04nTjOVrEmFEOc5QXt8uG9HEd2IRg/zBqpegDKd8y TK+iV/aaCfd/aHF9V1Vr8lQmaVi8utxp+xjPCQVWCXkjLfwOjLx/4NpmQ8rAtNaC1N0N kbJzKMYSyiq/zkHYWP9utYBYmRapiU4ahBiSI3Qsvi6StdXMZgtiF1BlcAsD5p5GBGBi g2ThA/o1Uny4J4SwTsCukogC73VvGG7Mt0d9uCiEkoaYBF9c04/PnkjJWURSuZEFa+YJ 434zvIUVAIVZh88eG+GIjL7uk5H7iY26Bb9jSvusB/7eMG62oP3sUB6rsNskpNTiaDhQ jD5w== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@chromium.org header.s=google header.b=g7q7Bwya; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=chromium.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [23.128.96.18]) by mx.google.com with ESMTP id cq20si8495007edb.563.2020.12.13.05.29.54; Sun, 13 Dec 2020 05:30:43 -0800 (PST) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) client-ip=23.128.96.18; Authentication-Results: mx.google.com; dkim=pass header.i=@chromium.org header.s=google header.b=g7q7Bwya; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=chromium.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S2406745AbgLKWPT (ORCPT + 99 others); Fri, 11 Dec 2020 17:15:19 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:59902 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S2406726AbgLKWO4 (ORCPT ); Fri, 11 Dec 2020 17:14:56 -0500 Received: from mail-ua1-x92c.google.com (mail-ua1-x92c.google.com [IPv6:2607:f8b0:4864:20::92c]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id F002EC0613D3 for ; Fri, 11 Dec 2020 14:14:15 -0800 (PST) Received: by mail-ua1-x92c.google.com with SMTP id s23so3364394uaq.10 for ; Fri, 11 Dec 2020 14:14:15 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=chromium.org; s=google; h=mime-version:references:in-reply-to:from:date:message-id:subject:to :cc; bh=B+v8QnAZfVmqdM00Egj83ptDN3hTPJz74BI1U+QyDFM=; b=g7q7BwyabpGEt1cdczJmqxzv2S6iTyT9mkFah7BKR4FKU5Dr3lxJHEJC0Rr50ihcQE x1mkixFbjWFPbE0IiX/M08n2k7Qd6Hc7d6scCrDuqsa0QM/mQUpTbrYJPT9xoIGnPfRQ ULTkk4v6bW1+d6xwlNbplePkS2/QY4dSfBP1s= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:mime-version:references:in-reply-to:from:date :message-id:subject:to:cc; bh=B+v8QnAZfVmqdM00Egj83ptDN3hTPJz74BI1U+QyDFM=; b=clYKXhdrdbV0Dql15VvZ/mcImzu/r3UYsn6M/NLYyyUNy3b25uMeIj5MHs9stTZp8u pTEP0+d1ZqU4RTweq4mL21CPYge5XiwY21bERj6KS+ejvK1Fz8ozsMqjdS9Az6bhVBHx oupv3CWsNvfc/l4z8XyTDHVO+moiUJ4zW8uLht5A7k+DC0eyar7Bv0ze2yQi0er7/9cn bhdjXtF+gCZS95dYftKiUjM59hGZWQ/m/eUlyise75UA+ex/XIgD7LzDLZgXfiWehpKV O/Zm/5UydIZBPnmZANJZNMQbNRcg4/3XMc8RfAbqpDKJG8enD+fQn97rAj0OpCCupm0T o4qQ== X-Gm-Message-State: AOAM531v2v+ubpb2UiAab9uqkHVW3oeG+QrytpvAzrQPubWL9KZB0m/r sbjKbPAWqrBprT1pjIcFaCrJ80vHOjTA/g== X-Received: by 2002:ab0:4597:: with SMTP id u23mr15427064uau.100.1607724854778; Fri, 11 Dec 2020 14:14:14 -0800 (PST) Received: from mail-ua1-f42.google.com (mail-ua1-f42.google.com. [209.85.222.42]) by smtp.gmail.com with ESMTPSA id y198sm1087874vsy.9.2020.12.11.14.14.13 for (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Fri, 11 Dec 2020 14:14:13 -0800 (PST) Received: by mail-ua1-f42.google.com with SMTP id f16so3356794uav.12 for ; Fri, 11 Dec 2020 14:14:13 -0800 (PST) X-Received: by 2002:ab0:6285:: with SMTP id z5mr14895918uao.0.1607724852718; Fri, 11 Dec 2020 14:14:12 -0800 (PST) MIME-Version: 1.0 References: <20201124094636.v2.1.I2702919afc253e2a451bebc3b701b462b2d22344@changeid> <20201124094636.v2.3.I771b6594b2a4d5b7fe7e12a991a6640f46386e8d@changeid> <5f24ec87-6d91-dfd9-0f4f-6687f37c60ac@codeaurora.org> <92c61a18-0a1d-099e-4a11-b33a052b4ec2@codeaurora.org> In-Reply-To: <92c61a18-0a1d-099e-4a11-b33a052b4ec2@codeaurora.org> From: Doug Anderson Date: Fri, 11 Dec 2020 14:14:01 -0800 X-Gmail-Original-Message-ID: Message-ID: Subject: Re: [PATCH v2 3/3] pinctrl: qcom: Clear possible pending irq when remuxing GPIOs To: Maulik Shah Cc: Rajendra Nayak , Marc Zyngier , Thomas Gleixner , Jason Cooper , Linus Walleij , "open list:GPIO SUBSYSTEM" , Neeraj Upadhyay , Stephen Boyd , Bjorn Andersson , Srinivas Ramana , linux-arm-msm , Andy Gross , LKML Content-Type: text/plain; charset="UTF-8" Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Hi, On Thu, Dec 10, 2020 at 11:07 PM Maulik Shah wrote: > > I have slightly modified your test case (see at > https://crrev.com/c/2584729) which is as per what i used in my testing. > > Here is what i am doing, setting GPIO to a fixed function (function 2 here) > Note that function 0 is the GPIO (interrupt mode). > > 1) Pull up the GPIO in function 2 > 2) Pull down the GPIO in function 2 > > Repeat above steps, and you will see fake interrupt every time pull down/up. > This proves that if you mux away from GPIO then still PDC sees the line > and can latch the interrupt at GIC. Ah, super useful example! Thanks! Yes, I can replicate your results. ...but this seems to contradict my other test. Ah, dang, I think I see the problem with my original test. The important difference is that in your test you used the alternate function "mi2s_2" and in mine I used "qspi_data". When I selected "qspi_data" it must have been actively driving the pin and _that's_ why I couldn't affect it. When I change my test to use "mi2s_2" then my toggles via "wp enable" and "wp disable" cause phantom interrupts. That confirms what you're saying: the PDC _can_ see the twiddles even when muxed away. Presumably the active driving my "qspi_data" is also what caused my phantom glitches. So, as you said, that means my mental model is totally wrong here. Wow, if I had known that earlier I would have saved a lot of time. That'll learn me... OK, v4 being posted and you can see if that handles all the cases? -Doug