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[23.128.96.18]) by mx.google.com with ESMTP id bt28si10119252edb.269.2020.12.14.01.32.25; Mon, 14 Dec 2020 01:32:47 -0800 (PST) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) client-ip=23.128.96.18; Authentication-Results: mx.google.com; dkim=pass header.i=@aj.id.au header.s=fm1 header.b=UbSlnCLD; dkim=pass header.i=@messagingengine.com header.s=fm1 header.b=Kq28aFtv; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1730951AbgLMXjw (ORCPT + 99 others); Sun, 13 Dec 2020 18:39:52 -0500 Received: from new1-smtp.messagingengine.com ([66.111.4.221]:40285 "EHLO new1-smtp.messagingengine.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1727178AbgLMXjw (ORCPT ); Sun, 13 Dec 2020 18:39:52 -0500 Received: from compute3.internal (compute3.nyi.internal [10.202.2.43]) by mailnew.nyi.internal (Postfix) with ESMTP id 884EF5802F6; Sun, 13 Dec 2020 18:39:05 -0500 (EST) Received: from imap2 ([10.202.2.52]) by compute3.internal (MEProxy); Sun, 13 Dec 2020 18:39:05 -0500 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=aj.id.au; h= mime-version:message-id:in-reply-to:references:date:from:to:cc :subject:content-type; s=fm1; bh=4lHOpViz9Uk605e41Hrs+5fXfKYstr/ VFbQwhb8nXrg=; b=UbSlnCLDhANCg855IwkVcVmwuahAyDXV27svY2ihosz96I6 gK5fkE6GfHwOqm5splI79tFW5n23NQyUGo7w+TdYNp3QoG+hrta31NSTnzo+m6EO NTfrQQNZQfHbrygy42U9ERoeAF1G/WX4lu9NZsLdIgDKkxcyPfddRV5TOkhYB3ms 8UhWBmMW2i7j/hxF25ge6NN8CBPXWe3HGpR5+9kVd+42Zo0VkKAHTOzoe3VNjRKZ 6fA+Yb9n0IdYp9VLwdKc3t2m8nL0wHBBDXT9UBFhAcHXofkGTH/vGdujuxtx8N+A PcJz82QE2mo1XdmxR63mV0lSq71nnzViQ9ju51A== DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d= messagingengine.com; h=cc:content-type:date:from:in-reply-to :message-id:mime-version:references:subject:to:x-me-proxy :x-me-proxy:x-me-sender:x-me-sender:x-sasl-enc; s=fm1; bh=4lHOpV iz9Uk605e41Hrs+5fXfKYstr/VFbQwhb8nXrg=; b=Kq28aFtvvATd6Vay+s70mN PGLpfc6Oq636taHkqOI8AZnP4LvAibjukn9GHz6eBEkSrEkr8bp2Lt1BU+9lyEG2 tnw0VsuY0YShAmV27Tt8HdCK2QKArm9ziIZV+HSi61bSmsjB6PM0QNiw0otIZflq 8YscBHKOjfFqZ2zLrvkX3CHnLFMvSyL/O0TIEBmmcyoTwEKSrKfzytGVlsHqdeZT I/kcNRqeKGxNroNpGca8jIDqcm8RyTab4+cRijHigtU+Alj3/R8ioav36d+fTykT ggByfpBhofiG8x4A84DttPURq2cVOsd1+D8ofY35y5Xq3hW8ik6b5M1qU8ZHF0gA == X-ME-Sender: X-ME-Proxy-Cause: gggruggvucftvghtrhhoucdtuddrgedujedrudekiedgudejiecutefuodetggdotefrod ftvfcurfhrohhfihhlvgemucfhrghsthforghilhdpqfgfvfdpuffrtefokffrpgfnqfgh necuuegrihhlohhuthemuceftddtnecusecvtfgvtghiphhivghnthhsucdlqddutddtmd enucfjughrpefofgggkfgjfhffhffvufgtsehttdertderredtnecuhfhrohhmpedftehn ughrvgifucflvghffhgvrhihfdcuoegrnhgurhgvfiesrghjrdhiugdrrghuqeenucggtf frrghtthgvrhhnpeehhfefkefgkeduveehffehieehudejfeejveejfedugfefuedtuedv hefhveeuffenucevlhhushhtvghrufhiiigvpedtnecurfgrrhgrmhepmhgrihhlfhhroh hmpegrnhgurhgvfiesrghjrdhiugdrrghu X-ME-Proxy: Received: by mailuser.nyi.internal (Postfix, from userid 501) id 1EB68E00B2; Sun, 13 Dec 2020 18:39:02 -0500 (EST) X-Mailer: MessagingEngine.com Webmail Interface User-Agent: Cyrus-JMAP/3.3.1-61-gb52c239-fm-20201210.001-gb52c2396 Mime-Version: 1.0 Message-Id: <5eec9b11-c0b7-4b77-8c03-ec2c7d52d828@www.fastmail.com> In-Reply-To: References: <20201210065013.29348-1-troy_lee@aspeedtech.com> Date: Mon, 14 Dec 2020 10:08:42 +1030 From: "Andrew Jeffery" To: "Andy Shevchenko" , "Troy Lee" Cc: "OpenBMC Maillist" , "Linus Walleij" , "Bartosz Golaszewski" , "Joel Stanley" , "open list:GPIO SUBSYSTEM" , "moderated list:ARM/ASPEED MACHINE SUPPORT" , "moderated list:ARM/ASPEED MACHINE SUPPORT" , "open list" , "Troy Lee" , "Ryan Chen" , "Chia-Wei, Wang" Subject: Re: [PATCH] gpio: aspeed: Lock GPIO pin used as IRQ Content-Type: text/plain Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Fri, 11 Dec 2020, at 00:44, Andy Shevchenko wrote: > On Thu, Dec 10, 2020 at 9:36 AM Troy Lee wrote: > > > > GPIO pins can be used as IRQ indicators. When they do, > > those pins should be flaged with locks to avoid kernel > > flagged > > > warning message. > > ... > > > @@ -651,6 +651,13 @@ static int aspeed_gpio_set_type(struct irq_data *d, unsigned int type) > > > + rc = gpiochip_lock_as_irq(&gpio->chip, d->hwirq); > > + if (rc) { > > + dev_err(gpio->chip.parent, "unable to lock GPIO %lu as IRQ\n", > > + d->hwirq); > > + return rc; > > + } > > It's a copy'n'paste of generic code. Why do you need it in an unusual > place, i.e. ->irq_set_type() IIUC? > Can you elaborate about an issue, because this seems to be a hack? Yep - Troy please provide more information. What was the warning you saw? How were the GPIOs allocated on the system that triggered the warning? What did you do to trigger the warning? Andrew