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Tue, 15 Dec 2020 07:34:53 +0000 From: Suravee Suthikulpanit To: linux-kernel@vger.kernel.org, iommu@lists.linux-foundation.org Cc: joro@8bytes.org, will@kernel.org, Suravee Suthikulpanit Subject: [PATCH v4 12/13] iommu/amd: Introduce iommu_v1_map_page and iommu_v1_unmap_page Date: Tue, 15 Dec 2020 01:37:04 -0600 Message-Id: <20201215073705.123786-13-suravee.suthikulpanit@amd.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20201215073705.123786-1-suravee.suthikulpanit@amd.com> References: <20201215073705.123786-1-suravee.suthikulpanit@amd.com> Content-Type: text/plain X-Originating-IP: [165.204.78.2] X-ClientProxiedBy: SN2PR01CA0060.prod.exchangelabs.com (2603:10b6:800::28) To BYAPR12MB4597.namprd12.prod.outlook.com (2603:10b6:a03:10b::14) MIME-Version: 1.0 X-MS-Exchange-MessageSentRepresentingType: 1 Received: from ethanolx5673host.amd.com (165.204.78.2) by SN2PR01CA0060.prod.exchangelabs.com (2603:10b6:800::28) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.3654.12 via Frontend Transport; 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X-MS-Exchange-AntiSpam-MessageData: =?us-ascii?Q?pJclH9+X5jYAUtQWLAjMYSYmOeKgzZvUGGzpl5vwL+lwWYgOTW8n2LCF8h3k?= =?us-ascii?Q?FyTvOoWXws0fcS8Q9TYSpKIigkFvvmeUDtm4n2qvv9kQxVdMSqquD0815DVX?= =?us-ascii?Q?ZHvcfscX7AQwoRV3jMPCfZ37kLjTdC0YynN28M5tnT+vWUlfJSgRez68DbKf?= =?us-ascii?Q?YAWJMvrYI5gx0m1dg/ggeyKh6//vuMKdCxPFHsdxRCh4imMdUsvdBg4+rObS?= =?us-ascii?Q?oaOwfkKI6YdsUSYUGzBpi2d5kwrZo2jsfealn69uHWNPehaBfWXq43ardTbm?= =?us-ascii?Q?YQOOLA3yrBUt765O1juuCCng4fLWA0MdyvURfSCeApu5qqPKCWCPGkLaOkoA?= =?us-ascii?Q?Zmx3MUYV0rv2qTqbp4IOKKQbVNvlFw8yPmwsctpNLS7ykL8KRkB7qDL9+yxH?= =?us-ascii?Q?HxmH+NxiVmJtcCNU7lEw4OVqAyzfwbcoLjxa5C3SJCnUFmweHHAbcjp51m/2?= =?us-ascii?Q?Xwy1nRe6w3FDCh/gVxwojH02oC3fdXhrqX8Cs+nxzdbvpmmr+P3BHnYTvMk0?= =?us-ascii?Q?SsSRscB/+1imnkymprYeL2ka9K/UKC8nBxZISxTIFt/PESxt+mOvJoacxnRu?= =?us-ascii?Q?+hQ8qsbAqmriqvPdbz6O1xZmSV/lHJxwbJ1yOuWZ8C6RYyLMxn8o5+ADtMG0?= =?us-ascii?Q?S9DEp1Hrjkn+Zf/B6INPPPoJcW8T8IE8eY/ufqeLFc9Y4qvSZRiKQFO9UAR9?= =?us-ascii?Q?iL6tuS7/ycC2RpIAV6f/rYg4Zdgr8x1jkuJZS7OspGkToaHW60Hx37sV50zb?= =?us-ascii?Q?iDRhKEEVZ+knP2v4UCP1/h8ZaD7z9fs2nWBCKM82pGLViWvTK4+BSHOHVUFf?= =?us-ascii?Q?tKP/3RnO9unQZZQgrnuVz2EfxxuA+k6RJW1paFROOlx0TcV//ZQ8CN+0gzhy?= =?us-ascii?Q?xmD7PCS2GdJAX2d4w1+IVJwd4IO7KLhknuAjWbwi0D/FgjUAkRCLHm2Xn5Wh?= =?us-ascii?Q?21T9O64Al5FHutkDG8qCV2zfkgdoOcPk+2gVzYxRPldp6MNkbyF+s3sL9UTE?= =?us-ascii?Q?gA1d?= X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-AuthSource: BYAPR12MB4597.namprd12.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Internal X-MS-Exchange-CrossTenant-OriginalArrivalTime: 15 Dec 2020 07:34:53.2120 (UTC) X-MS-Exchange-CrossTenant-FromEntityHeader: Hosted X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-Network-Message-Id: 722a5ec7-f56e-42e6-4630-08d8a0cbe9d5 X-MS-Exchange-CrossTenant-MailboxType: HOSTED X-MS-Exchange-CrossTenant-UserPrincipalName: bxDZdKtIKhDyW6qJ2ennYwhYBEjc4P1pPHQ0RBu8RAY0h0bNg6tF4tguX+b1oIiuoUYhCotohh+FYNZ2+fpiEQ== X-MS-Exchange-Transport-CrossTenantHeadersStamped: BYAPR12MB3127 Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org These implement map and unmap for AMD IOMMU v1 pagetable, which will be used by the IO pagetable framework. Also clean up unused extern function declarations. Signed-off-by: Suravee Suthikulpanit --- drivers/iommu/amd/amd_iommu.h | 13 ------------- drivers/iommu/amd/io_pgtable.c | 25 ++++++++++++------------- drivers/iommu/amd/iommu.c | 13 ++++++++----- 3 files changed, 20 insertions(+), 31 deletions(-) diff --git a/drivers/iommu/amd/amd_iommu.h b/drivers/iommu/amd/amd_iommu.h index 83ca822c5349..3770b1a4d51c 100644 --- a/drivers/iommu/amd/amd_iommu.h +++ b/drivers/iommu/amd/amd_iommu.h @@ -133,19 +133,6 @@ void amd_iommu_apply_ivrs_quirks(void); static inline void amd_iommu_apply_ivrs_quirks(void) { } #endif -/* TODO: These are temporary and will be removed once fully transition */ -extern int iommu_map_page(struct protection_domain *dom, - unsigned long bus_addr, - unsigned long phys_addr, - unsigned long page_size, - int prot, - gfp_t gfp); -extern unsigned long iommu_unmap_page(struct protection_domain *dom, - unsigned long bus_addr, - unsigned long page_size); -extern u64 *fetch_pte(struct amd_io_pgtable *pgtable, - unsigned long address, - unsigned long *page_size); extern void amd_iommu_domain_set_pgtable(struct protection_domain *domain, u64 *root, int mode); #endif diff --git a/drivers/iommu/amd/io_pgtable.c b/drivers/iommu/amd/io_pgtable.c index a293b69b38b9..d91964e98d58 100644 --- a/drivers/iommu/amd/io_pgtable.c +++ b/drivers/iommu/amd/io_pgtable.c @@ -317,9 +317,9 @@ static u64 *alloc_pte(struct protection_domain *domain, * This function checks if there is a PTE for a given dma address. If * there is one, it returns the pointer to it. */ -u64 *fetch_pte(struct amd_io_pgtable *pgtable, - unsigned long address, - unsigned long *page_size) +static u64 *fetch_pte(struct amd_io_pgtable *pgtable, + unsigned long address, + unsigned long *page_size) { int level; u64 *pte; @@ -392,13 +392,10 @@ static struct page *free_clear_pte(u64 *pte, u64 pteval, struct page *freelist) * supporting all features of AMD IOMMU page tables like level skipping * and full 64 bit address spaces. */ -int iommu_map_page(struct protection_domain *dom, - unsigned long iova, - unsigned long paddr, - unsigned long size, - int prot, - gfp_t gfp) +static int iommu_v1_map_page(struct io_pgtable_ops *ops, unsigned long iova, + phys_addr_t paddr, size_t size, int prot, gfp_t gfp) { + struct protection_domain *dom = io_pgtable_ops_to_domain(ops); struct page *freelist = NULL; bool updated = false; u64 __pte, *pte; @@ -461,11 +458,11 @@ int iommu_map_page(struct protection_domain *dom, return ret; } -unsigned long iommu_unmap_page(struct protection_domain *dom, - unsigned long iova, - unsigned long size) +static unsigned long iommu_v1_unmap_page(struct io_pgtable_ops *ops, + unsigned long iova, + size_t size, + struct iommu_iotlb_gather *gather) { - struct io_pgtable_ops *ops = &dom->iop.iop.ops; struct amd_io_pgtable *pgtable = io_pgtable_ops_to_data(ops); unsigned long long unmapped; unsigned long unmap_size; @@ -554,6 +551,8 @@ static struct io_pgtable *v1_alloc_pgtable(struct io_pgtable_cfg *cfg, void *coo cfg->oas = IOMMU_OUT_ADDR_BIT_SIZE, cfg->tlb = &v1_flush_ops; + pgtable->iop.ops.map = iommu_v1_map_page; + pgtable->iop.ops.unmap = iommu_v1_unmap_page; pgtable->iop.ops.iova_to_phys = iommu_v1_iova_to_phys; return &pgtable->iop; diff --git a/drivers/iommu/amd/iommu.c b/drivers/iommu/amd/iommu.c index 29b7fefc8485..1f04b251f0c6 100644 --- a/drivers/iommu/amd/iommu.c +++ b/drivers/iommu/amd/iommu.c @@ -2066,8 +2066,9 @@ static int amd_iommu_map(struct iommu_domain *dom, unsigned long iova, gfp_t gfp) { struct protection_domain *domain = to_pdomain(dom); + struct io_pgtable_ops *ops = &domain->iop.iop.ops; int prot = 0; - int ret; + int ret = -EINVAL; if (domain->iop.mode == PAGE_MODE_NONE) return -EINVAL; @@ -2077,9 +2078,10 @@ static int amd_iommu_map(struct iommu_domain *dom, unsigned long iova, if (iommu_prot & IOMMU_WRITE) prot |= IOMMU_PROT_IW; - ret = iommu_map_page(domain, iova, paddr, page_size, prot, gfp); - - domain_flush_np_cache(domain, iova, page_size); + if (ops->map) { + ret = ops->map(ops, iova, paddr, page_size, prot, gfp); + domain_flush_np_cache(domain, iova, page_size); + } return ret; } @@ -2089,11 +2091,12 @@ static size_t amd_iommu_unmap(struct iommu_domain *dom, unsigned long iova, struct iommu_iotlb_gather *gather) { struct protection_domain *domain = to_pdomain(dom); + struct io_pgtable_ops *ops = &domain->iop.iop.ops; if (domain->iop.mode == PAGE_MODE_NONE) return 0; - return iommu_unmap_page(domain, iova, page_size); + return (ops->unmap) ? ops->unmap(ops, iova, page_size, gather) : 0; } static phys_addr_t amd_iommu_iova_to_phys(struct iommu_domain *dom, -- 2.17.1