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References: <20201203074037.26940-1-alexandru.ardelean@analog.com>
Subject: Re: [RESEND PATCH 1/2] clk: axi-clkgen: wrap limits in a struct and keep copy on the state object
From:   Stephen Boyd <sboyd@kernel.org>
Cc:     mturquette@baylibre.com, mdf@kernel.org, lars@metafoo.de,
        ardeleanalex@gmail.com,
        Alexandru Ardelean <alexandru.ardelean@analog.com>
To:     Alexandru Ardelean <alexandru.ardelean@analog.com>,
        linux-clk@vger.kernel.org, linux-kernel@vger.kernel.org
Date:   Thu, 17 Dec 2020 01:53:09 -0800
Message-ID: <160819878921.1580929.15203556505418978794@swboyd.mtv.corp.google.com>
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Quoting Alexandru Ardelean (2020-12-02 23:40:36)
> Up until the these limits were global/hard-coded, since they are typically
> limits of the fabric.
>=20
> However, since this is an FPGA generated clock, this may run on setups
> where one clock is on a fabric, and another one synthesized on another
> fabric connected via PCIe (or some other inter-connect, and then these
> limits need to be adjusted for each instance of the AXI CLKGEN.
>=20
> This change wraps the current constants in 'axi_clkgen_limits' struct and
> the 'axi_clkgen' instance keeps a copy of these limits, which is
> initialized at probe from the default limits.
>=20
> The limits are stored on the device-tree OF table, so that we can adjust
> them via the compatible string.
>=20
> Signed-off-by: Alexandru Ardelean <alexandru.ardelean@analog.com>
> ---

Applied to clk-next