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Subject: Re: [PATCH] clk: exynos7: Mark aclk_fsys1_200 as critical
From:   Stephen Boyd <sboyd@kernel.org>
Cc:     s.nawrocki@samsung.com, tomasz.figa@gmail.com,
        cw00.choi@samsung.com, linux-samsung-soc@vger.kernel.org,
        linux-clk@vger.kernel.org, linux-arm-kernel@lists.infradead.org,
        linux-kernel@vger.kernel.org, pawel.mikolaj.chmiel@gmail.com
To:     pawel.mikolaj.chmiel@gmail.com, kgene@kernel.org, krzk@kernel.org,
        mturquette@baylibre.com
Date:   Thu, 17 Dec 2020 02:14:24 -0800
Message-ID: <160820006410.1580929.8444804722224099547@swboyd.mtv.corp.google.com>
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Precedence: bulk

Not sure why this wasn't picked up in the samsung PR. Can you resend?

> diff --git a/drivers/clk/samsung/clk-exynos7.c b/drivers/clk/samsung/clk-=
exynos7.c
> index c1ff715e960c..1048d83f097b 100644
> --- a/drivers/clk/samsung/clk-exynos7.c
> +++ b/drivers/clk/samsung/clk-exynos7.c
> @@ -538,7 +538,8 @@ static const struct samsung_gate_clock top1_gate_clks=
[] __initconst =3D {
>                 ENABLE_ACLK_TOP13, 28, CLK_SET_RATE_PARENT |
>                 CLK_IS_CRITICAL, 0),
>         GATE(CLK_ACLK_FSYS1_200, "aclk_fsys1_200", "dout_aclk_fsys1_200",
> -               ENABLE_ACLK_TOP13, 24, CLK_SET_RATE_PARENT, 0),
> +               ENABLE_ACLK_TOP13, 24, CLK_SET_RATE_PARENT |
> +               CLK_IS_CRITICAL, 0),
> =20

Please put a comment in the code why a clk is critical.